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| author | Sanjay Patel <spatel@rotateright.com> | 2019-01-01 21:51:39 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2019-01-01 21:51:39 +0000 |
| commit | 654e6aabb9f25d0d0fbad194ae6e26dd96c9e9db (patch) | |
| tree | 24050f1ba2ef6fb0ab5a7667646fac810bfb6e2c /llvm/test/Transforms/PhaseOrdering | |
| parent | 00b390a00044ba15f6e1b7c3200d86fc576ccdf7 (diff) | |
| download | bcm5719-llvm-654e6aabb9f25d0d0fbad194ae6e26dd96c9e9db.tar.gz bcm5719-llvm-654e6aabb9f25d0d0fbad194ae6e26dd96c9e9db.zip | |
[InstCombine] canonicalize raw IR rotate patterns to funnel shift
The final piece of IR-level analysis to allow this was committed with:
rL350188
Using the intrinsics should improve transforms based on cost models
like vectorization and inlining.
The backend should be prepared too, so we can now canonicalize more
sequences of shift/logic to the intrinsics and know that the end
result should be equal or better to the original code even if the
target does not have an actual rotate instruction.
llvm-svn: 350199
Diffstat (limited to 'llvm/test/Transforms/PhaseOrdering')
| -rw-r--r-- | llvm/test/Transforms/PhaseOrdering/rotate.ll | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/llvm/test/Transforms/PhaseOrdering/rotate.ll b/llvm/test/Transforms/PhaseOrdering/rotate.ll index 190807668ee..e10a46cb830 100644 --- a/llvm/test/Transforms/PhaseOrdering/rotate.ll +++ b/llvm/test/Transforms/PhaseOrdering/rotate.ll @@ -5,6 +5,9 @@ ; This should become a single funnel shift through a combination ; of aggressive-instcombine, simplifycfg, and instcombine. ; https://bugs.llvm.org/show_bug.cgi?id=34924 +; These are equivalent, but the value name with the new-pm shows a bug - +; this code should not have been converted to a speculative select with +; an intermediate transform. define i32 @rotl(i32 %a, i32 %b) { ; OLDPM-LABEL: @rotl( @@ -14,12 +17,7 @@ define i32 @rotl(i32 %a, i32 %b) { ; ; NEWPM-LABEL: @rotl( ; NEWPM-NEXT: entry: -; NEWPM-NEXT: [[TMP0:%.*]] = sub i32 0, [[B:%.*]] -; NEWPM-NEXT: [[TMP1:%.*]] = and i32 [[B]], 31 -; NEWPM-NEXT: [[TMP2:%.*]] = and i32 [[TMP0]], 31 -; NEWPM-NEXT: [[TMP3:%.*]] = lshr i32 [[A:%.*]], [[TMP2]] -; NEWPM-NEXT: [[TMP4:%.*]] = shl i32 [[A]], [[TMP1]] -; NEWPM-NEXT: [[SPEC_SELECT:%.*]] = or i32 [[TMP3]], [[TMP4]] +; NEWPM-NEXT: [[SPEC_SELECT:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]]) ; NEWPM-NEXT: ret i32 [[SPEC_SELECT]] ; entry: |
