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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/Transforms/LowerExpectIntrinsic | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/Transforms/LowerExpectIntrinsic')
| -rw-r--r-- | llvm/test/Transforms/LowerExpectIntrinsic/basic.ll | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/llvm/test/Transforms/LowerExpectIntrinsic/basic.ll b/llvm/test/Transforms/LowerExpectIntrinsic/basic.ll index f4326c8393c..5d723710be0 100644 --- a/llvm/test/Transforms/LowerExpectIntrinsic/basic.ll +++ b/llvm/test/Transforms/LowerExpectIntrinsic/basic.ll @@ -7,7 +7,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %cmp = icmp sgt i32 %tmp, 1 %conv = zext i1 %cmp to i32 %conv1 = sext i32 %conv to i64 @@ -27,7 +27,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -41,7 +41,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %conv = sext i32 %tmp to i64 %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) %tobool = icmp ne i64 %expval, 0 @@ -59,7 +59,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -69,7 +69,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %tobool = icmp ne i32 %tmp, 0 %lnot = xor i1 %tobool, true %lnot.ext = zext i1 %lnot to i32 @@ -90,7 +90,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -100,7 +100,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %tobool = icmp ne i32 %tmp, 0 %lnot = xor i1 %tobool, true %lnot1 = xor i1 %lnot, true @@ -122,7 +122,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -132,7 +132,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %cmp = icmp slt i32 %tmp, 0 %conv = zext i1 %cmp to i32 %conv1 = sext i32 %conv to i64 @@ -152,7 +152,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -162,7 +162,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %conv = sext i32 %tmp to i64 %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) ; CHECK: !prof !2 @@ -181,7 +181,7 @@ sw.epilog: ; preds = %entry br label %return return: ; preds = %sw.epilog, %sw.bb - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -191,7 +191,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %conv = sext i32 %tmp to i64 %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) ; CHECK: !prof !3 @@ -202,7 +202,7 @@ entry: ] sw.bb: ; preds = %entry, %entry - %tmp1 = load i32* %x.addr, align 4 + %tmp1 = load i32, i32* %x.addr, align 4 store i32 %tmp1, i32* %retval br label %return @@ -211,7 +211,7 @@ sw.epilog: ; preds = %entry br label %return return: ; preds = %sw.epilog, %sw.bb - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -221,7 +221,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %cmp = icmp sgt i32 %tmp, 1 %conv = zext i1 %cmp to i32 %expval = call i32 @llvm.expect.i32(i32 %conv, i32 1) @@ -240,7 +240,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } @@ -252,7 +252,7 @@ entry: %retval = alloca i32, align 4 %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 - %tmp = load i32* %x.addr, align 4 + %tmp = load i32, i32* %x.addr, align 4 %cmp = icmp sgt i32 %tmp, 1 %expval = call i1 @llvm.expect.i1(i1 %cmp, i1 1) ; CHECK: !prof !0 @@ -269,7 +269,7 @@ if.end: ; preds = %entry br label %return return: ; preds = %if.end, %if.then - %0 = load i32* %retval + %0 = load i32, i32* %retval ret i32 %0 } |

