summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/LoopVectorize
diff options
context:
space:
mode:
authorFlorian Hahn <flo@fhahn.com>2020-01-28 08:20:40 -0800
committerHans Wennborg <hans@chromium.org>2020-01-29 22:02:52 +0100
commitb0536b58c1b40ac946bb653d13a63e4372c2ca17 (patch)
treeb406fd9d485182488767a8f7ac07309ca7a32b46 /llvm/test/Transforms/LoopVectorize
parentd275de35f8bdb92e7b5789ebdb96df99fab504ab (diff)
downloadbcm5719-llvm-b0536b58c1b40ac946bb653d13a63e4372c2ca17.tar.gz
bcm5719-llvm-b0536b58c1b40ac946bb653d13a63e4372c2ca17.zip
[LV] Do not try to sink dead instructions.
Dead instructions do not need to be sunk. Currently we try and record the recipies for them, but there are no recipes emitted for them and there's nothing to sink. They can be removed from SinkAfter while marking them for recording. Fixes PR44634. Reviewers: rengolin, hsaito, fhahn, Ayal, gilr Reviewed By: gilr Differential Revision: https://reviews.llvm.org/D73423 (cherry picked from commit a911fef3dd79e0a04b241be7b476dde7e99744c4)
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize')
-rw-r--r--llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
index f86dcd7e2e7..5a250984b1f 100644
--- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
@@ -607,3 +607,41 @@ cond.end: ; preds = %for.body4, %cond.tr
for.end12.loopexit: ; preds = %cond.end
ret void
}
+
+; Dead instructions, like the exit condition are not part of the actual VPlan
+; and do not need to be sunk. PR44634.
+define void @sink_dead_inst() {
+; SINK-AFTER-LABEL: define void @sink_dead_inst(
+; SINK-AFTER-LABEL: vector.body: ; preds = %vector.body, %vector.ph
+; SINK-AFTER-NEXT: %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
+; SINK-AFTER-NEXT: %vec.ind = phi <4 x i16> [ <i16 -27, i16 -26, i16 -25, i16 -24>, %vector.ph ], [ %vec.ind.next, %vector.body ]
+; SINK-AFTER-NEXT: %vector.recur = phi <4 x i16> [ <i16 undef, i16 undef, i16 undef, i16 0>, %vector.ph ], [ %3, %vector.body ]
+; SINK-AFTER-NEXT: %vector.recur2 = phi <4 x i32> [ <i32 undef, i32 undef, i32 undef, i32 -27>, %vector.ph ], [ %1, %vector.body ]
+; SINK-AFTER-NEXT: %0 = add <4 x i16> %vec.ind, <i16 1, i16 1, i16 1, i16 1>
+; SINK-AFTER-NEXT: %1 = zext <4 x i16> %0 to <4 x i32>
+; SINK-AFTER-NEXT: %2 = shufflevector <4 x i32> %vector.recur2, <4 x i32> %1, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
+; SINK-AFTER-NEXT: %3 = add <4 x i16> %0, <i16 5, i16 5, i16 5, i16 5>
+; SINK-AFTER-NEXT: %4 = shufflevector <4 x i16> %vector.recur, <4 x i16> %3, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
+; SINK-AFTER-NEXT: %5 = sub <4 x i16> %4, <i16 10, i16 10, i16 10, i16 10>
+; SINK-AFTER-NEXT: %index.next = add i32 %index, 4
+; SINK-AFTER-NEXT: %vec.ind.next = add <4 x i16> %vec.ind, <i16 4, i16 4, i16 4, i16 4>
+; SINK-AFTER-NEXT: %6 = icmp eq i32 %index.next, 40
+; SINK-AFTER-NEXT: br i1 %6, label %middle.block, label %vector.body, !llvm.loop !43
+;
+entry:
+ br label %for.cond
+
+for.cond:
+ %iv = phi i16 [ -27, %entry ], [ %iv.next, %for.cond ]
+ %rec.1 = phi i16 [ 0, %entry ], [ %rec.1.prev, %for.cond ]
+ %rec.2 = phi i32 [ -27, %entry ], [ %rec.2.prev, %for.cond ]
+ %use.rec.1 = sub i16 %rec.1, 10
+ %cmp = icmp eq i32 %rec.2, 15
+ %iv.next = add i16 %iv, 1
+ %rec.2.prev = zext i16 %iv.next to i32
+ %rec.1.prev = add i16 %iv.next, 5
+ br i1 %cmp, label %for.end, label %for.cond
+
+for.end:
+ ret void
+}
OpenPOWER on IntegriCloud