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| author | Sanjay Patel <spatel@rotateright.com> | 2016-03-09 22:23:33 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-03-09 22:23:33 +0000 |
| commit | 9f6c4d50b4b934e97e3e4bd1160df573b203ad0d (patch) | |
| tree | bb5eff4ecb88712d44f083fbb10a4a2e29a65e2a /llvm/test/Transforms/LoopVectorize | |
| parent | 3e895805716a5dfc68f339a0c70c03f69a5f562f (diff) | |
| download | bcm5719-llvm-9f6c4d50b4b934e97e3e4bd1160df573b203ad0d.tar.gz bcm5719-llvm-9f6c4d50b4b934e97e3e4bd1160df573b203ad0d.zip | |
[x86] fix cost model inaccuracy for vector memory ops
The irony of this patch is that one CPU that is affected is AMD Jaguar, and Jaguar
has a completely double-pumped AVX implementation. But getting the cost model to
reflect that is a much bigger problem. The small goal here is simply to improve on
the lie that !AVX2 == SandyBridge.
Differential Revision: http://reviews.llvm.org/D18000
llvm-svn: 263069
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/X86/avx1.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/X86/avx1.ll b/llvm/test/Transforms/LoopVectorize/X86/avx1.ll index 45d2346d13d..d384a8162ba 100644 --- a/llvm/test/Transforms/LoopVectorize/X86/avx1.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/avx1.ll @@ -26,10 +26,10 @@ define i32 @read_mod_write_single_ptr(float* nocapture %a, i32 %n) nounwind uwta ret i32 undef } -;;; FIXME: If 32-byte accesses are fast, this should use a <4 x i64> load. ; CHECK-LABEL: @read_mod_i64( -; CHECK: load <2 x i64> +; SLOWMEM32: load <2 x i64> +; FASTMEM32: load <4 x i64> ; CHECK: ret i32 define i32 @read_mod_i64(i64* nocapture %a, i32 %n) nounwind uwtable ssp { %1 = icmp sgt i32 %n, 0 |
