diff options
| author | Renato Golin <renato.golin@linaro.org> | 2018-02-26 11:06:36 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2018-02-26 11:06:36 +0000 |
| commit | 9d1b2acaaa224188977e070ecbe51a897121d4ad (patch) | |
| tree | 8bc799038e8ba2dca894d41111b4ff5946d1533a /llvm/test/Transforms/LoopVectorize | |
| parent | ed45836253e5d95444bdadb9cb697441467670fd (diff) | |
| download | bcm5719-llvm-9d1b2acaaa224188977e070ecbe51a897121d4ad.tar.gz bcm5719-llvm-9d1b2acaaa224188977e070ecbe51a897121d4ad.zip | |
[LV] Move isLegalMasked* functions from Legality to CostModel
All SIMD architectures can emulate masked load/store/gather/scatter
through element-wise condition check, scalar load/store, and
insert/extract. Therefore, bailing out of vectorization as legality
failure, when they return false, is incorrect. We should proceed to cost
model and determine profitability.
This patch is to address the vectorizer's architectural limitation
described above. As such, I tried to keep the cost model and
vectorize/don't-vectorize behavior nearly unchanged. Cost model tuning
should be done separately.
Please see
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120164.html for
RFC and the discussions.
Closes D43208.
Patch by: Hideki Saito <hideki.saito@intel.com>
llvm-svn: 326079
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/conditional-assignment.ll | 2 | ||||
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/hoist-loads.ll | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/conditional-assignment.ll b/llvm/test/Transforms/LoopVectorize/conditional-assignment.ll index 25d6111d65a..7d1071b05d8 100644 --- a/llvm/test/Transforms/LoopVectorize/conditional-assignment.ll +++ b/llvm/test/Transforms/LoopVectorize/conditional-assignment.ll @@ -1,7 +1,7 @@ ; RUN: opt < %s -enable-cond-stores-vec=false -loop-vectorize -S -pass-remarks-missed='loop-vectorize' -pass-remarks-analysis='loop-vectorize' 2>&1 | FileCheck %s ; RUN: opt < %s -enable-cond-stores-vec=false -passes=loop-vectorize -S -pass-remarks-missed='loop-vectorize' -pass-remarks-analysis='loop-vectorize' 2>&1 | FileCheck %s -; CHECK: remark: source.c:2:8: loop not vectorized: store that is conditionally executed prevents vectorization +; CHECK: remark: source.c:2:8: the cost-model indicates that vectorization is not beneficial target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" diff --git a/llvm/test/Transforms/LoopVectorize/hoist-loads.ll b/llvm/test/Transforms/LoopVectorize/hoist-loads.ll index a20b0f6cdf3..db4774d8ba9 100644 --- a/llvm/test/Transforms/LoopVectorize/hoist-loads.ll +++ b/llvm/test/Transforms/LoopVectorize/hoist-loads.ll @@ -37,8 +37,9 @@ for.end: } ; However, we can't hoist loads whose address we have not seen unconditionally -; accessed. +; accessed. One wide load is fine, but not the second. ; CHECK-LABEL: @dont_hoist_cond_load( +; CHECK: load <2 x float> ; CHECK-NOT: load <2 x float> define void @dont_hoist_cond_load() { |
