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authorMatthew Simpson <mssimpso@codeaurora.org>2016-10-19 19:22:02 +0000
committerMatthew Simpson <mssimpso@codeaurora.org>2016-10-19 19:22:02 +0000
commit41fa838f07c2cc456b16addb1703c0203e372047 (patch)
tree58d908eab51399abe3a4a11806cbdac32b41530f /llvm/test/Transforms/LoopVectorize
parent6e3a92ec880b3f7cd6048b74ef62f7a3ae2165fc (diff)
downloadbcm5719-llvm-41fa838f07c2cc456b16addb1703c0203e372047.tar.gz
bcm5719-llvm-41fa838f07c2cc456b16addb1703c0203e372047.zip
[LV] Avoid emitting trivially dead instructions
Some instructions from the original loop, when vectorized, can become trivially dead. This happens because of the way we structure the new loop. For example, we create new induction variables and induction variable "steps" in the new loop. Thus, when we go to vectorize the original induction variable update, it may no longer be needed due to the instructions we've already created. This patch prevents us from creating these redundant instructions. This reduces code size before simplification and allows greater flexibility in code generation since we have fewer unnecessary instruction uses. Differential Revision: https://reviews.llvm.org/D25631 llvm-svn: 284631
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize')
-rw-r--r--llvm/test/Transforms/LoopVectorize/dead_instructions.ll42
1 files changed, 42 insertions, 0 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/dead_instructions.ll b/llvm/test/Transforms/LoopVectorize/dead_instructions.ll
new file mode 100644
index 00000000000..fb929ee4ebd
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/dead_instructions.ll
@@ -0,0 +1,42 @@
+; RUN: opt < %s -force-vector-width=2 -force-vector-interleave=2 -loop-vectorize -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
+
+; CHECK-LABEL: @dead_instructions_01
+;
+; This test ensures that we don't generate trivially dead instructions prior to
+; instruction simplification. We don't need to generate instructions
+; corresponding to the original induction variable update or branch condition,
+; since we rewrite the loop structure.
+;
+; CHECK: vector.body:
+; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
+; CHECK: %[[I0:.+]] = add i64 %index, 0
+; CHECK: %[[I2:.+]] = add i64 %index, 2
+; CHECK: getelementptr inbounds i64, i64* %a, i64 %[[I0]]
+; CHECK: getelementptr inbounds i64, i64* %a, i64 %[[I2]]
+; CHECK-NOT: add nuw nsw i64 %[[I0]], 1
+; CHECK-NOT: add nuw nsw i64 %[[I2]], 1
+; CHECK-NOT: icmp slt i64 {{.*}}, %n
+; CHECK: %index.next = add i64 %index, 4
+; CHECK: %[[CMP:.+]] = icmp eq i64 %index.next, %n.vec
+; CHECK: br i1 %[[CMP]], label %middle.block, label %vector.body
+;
+define i64 @dead_instructions_01(i64 *%a, i64 %n) {
+entry:
+ br label %for.body
+
+for.body:
+ %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
+ %r = phi i64 [ %tmp2, %for.body ], [ 0, %entry ]
+ %tmp0 = getelementptr inbounds i64, i64* %a, i64 %i
+ %tmp1 = load i64, i64* %tmp0, align 8
+ %tmp2 = add i64 %tmp1, %r
+ %i.next = add nuw nsw i64 %i, 1
+ %cond = icmp slt i64 %i.next, %n
+ br i1 %cond, label %for.body, label %for.end
+
+for.end:
+ %tmp3 = phi i64 [ %tmp2, %for.body ]
+ ret i64 %tmp3
+}
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