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| author | David Majnemer <david.majnemer@gmail.com> | 2016-08-06 08:16:00 +0000 |
|---|---|---|
| committer | David Majnemer <david.majnemer@gmail.com> | 2016-08-06 08:16:00 +0000 |
| commit | a19d0f2f3e36d47abd13e2f7ae12256b5c2b1707 (patch) | |
| tree | ac935e80b0781b5d78c48226ce04d7293ffd5a30 /llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll | |
| parent | 1665d8635ece94cb98a3806e7c1d10c3c9084097 (diff) | |
| download | bcm5719-llvm-a19d0f2f3e36d47abd13e2f7ae12256b5c2b1707.tar.gz bcm5719-llvm-a19d0f2f3e36d47abd13e2f7ae12256b5c2b1707.zip | |
[ValueTracking] Teach computeKnownBits about [su]min/max
Reasoning about a select in terms of a min or max allows us to derive a
tigher bound on the result.
llvm-svn: 277914
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll index 868c3a2cdab..34998782aa8 100644 --- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll @@ -577,7 +577,7 @@ for.body: ; preds = %for.body, %entry ; CHECK: %n.mod.vf = and i64 %[[N:.+]], 3 ; CHECK: %[[IsZero:[a-zA-Z0-9]+]] = icmp eq i64 %n.mod.vf, 0 ; CHECK: %[[R:[a-zA-Z0-9]+]] = select i1 %[[IsZero]], i64 4, i64 %n.mod.vf -; CHECK: %n.vec = sub i64 %[[N]], %[[R]] +; CHECK: %n.vec = sub nsw i64 %[[N]], %[[R]] ; CHECK: vector.body: ; CHECK: %[[L1:.+]] = load <8 x i32>, <8 x i32>* {{.*}} ; CHECK: %[[X1:.+]] = extractelement <8 x i32> %[[L1]], i32 0 @@ -625,7 +625,7 @@ for.end: ; CHECK: %n.mod.vf = and i64 %[[N:.+]], 3 ; CHECK: %[[IsZero:[a-zA-Z0-9]+]] = icmp eq i64 %n.mod.vf, 0 ; CHECK: %[[R:[a-zA-Z0-9]+]] = select i1 %[[IsZero]], i64 4, i64 %n.mod.vf -; CHECK: %n.vec = sub i64 %[[N]], %[[R]] +; CHECK: %n.vec = sub nsw i64 %[[N]], %[[R]] ; CHECK: vector.body: ; CHECK: %[[Phi:.+]] = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ {{.*}}, %vector.body ] ; CHECK: %[[L1:.+]] = load <8 x i32>, <8 x i32>* {{.*}} @@ -678,7 +678,7 @@ for.end: ; CHECK: %n.mod.vf = and i64 %[[N:.+]], 3 ; CHECK: %[[IsZero:[a-zA-Z0-9]+]] = icmp eq i64 %n.mod.vf, 0 ; CHECK: %[[R:[a-zA-Z0-9]+]] = select i1 %[[IsZero]], i64 4, i64 %n.mod.vf -; CHECK: %n.vec = sub i64 %[[N]], %[[R]] +; CHECK: %n.vec = sub nsw i64 %[[N]], %[[R]] ; CHECK: vector.body: ; CHECK: %[[L1:.+]] = load <8 x i32>, <8 x i32>* {{.*}} ; CHECK: %[[X1:.+]] = extractelement <8 x i32> %[[L1]], i32 0 @@ -726,7 +726,7 @@ for.end: ; CHECK: %n.mod.vf = and i64 %[[N:.+]], 3 ; CHECK: %[[IsZero:[a-zA-Z0-9]+]] = icmp eq i64 %n.mod.vf, 0 ; CHECK: %[[R:[a-zA-Z0-9]+]] = select i1 %[[IsZero]], i64 4, i64 %n.mod.vf -; CHECK: %n.vec = sub i64 %[[N]], %[[R]] +; CHECK: %n.vec = sub nsw i64 %[[N]], %[[R]] ; CHECK: vector.body: ; CHECK: %[[Phi:.+]] = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ {{.*}}, %vector.body ] ; CHECK: %[[L1:.+]] = load <8 x i32>, <8 x i32>* {{.*}} |
