diff options
| author | Matthew Simpson <mssimpso@codeaurora.org> | 2016-09-26 17:08:37 +0000 |
|---|---|---|
| committer | Matthew Simpson <mssimpso@codeaurora.org> | 2016-09-26 17:08:37 +0000 |
| commit | b764aba2aba7465421e33d761df5b94c50a2f415 (patch) | |
| tree | d2e0b6361f98f0776ba2852be5e3a21ead092e88 /llvm/test/Transforms/LoopVectorize/induction_plus.ll | |
| parent | 5fa302cb65dd45743d9b5af26ca21500e8418bf2 (diff) | |
| download | bcm5719-llvm-b764aba2aba7465421e33d761df5b94c50a2f415.tar.gz bcm5719-llvm-b764aba2aba7465421e33d761df5b94c50a2f415.zip | |
[LV] Scalarize instructions marked scalar after vectorization
This patch ensures that we actually scalarize instructions marked scalar after
vectorization. Previously, such instructions may have been vectorized instead.
Differential Revision: https://reviews.llvm.org/D23889
llvm-svn: 282418
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/induction_plus.ll')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/induction_plus.ll | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/induction_plus.ll b/llvm/test/Transforms/LoopVectorize/induction_plus.ll index ce9abba41bd..b73158a8265 100644 --- a/llvm/test/Transforms/LoopVectorize/induction_plus.ll +++ b/llvm/test/Transforms/LoopVectorize/induction_plus.ll @@ -9,7 +9,9 @@ target triple = "x86_64-apple-macosx10.8.0" ;CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ] ;CHECK: %vec.ind = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %vector.ph ], [ %vec.ind.next, %vector.body ] ;CHECK: %vec.ind1 = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ %vec.ind.next2, %vector.body ] -;CHECK: add nsw <4 x i64> %vec.ind, <i64 12, i64 12, i64 12, i64 12> +;CHECK: %[[T1:.+]] = add i64 %index, 0 +;CHECK: %[[T2:.+]] = add nsw i64 %[[T1]], 12 +;CHECK: getelementptr inbounds [1024 x i32], [1024 x i32]* @array, i64 0, i64 %[[T2]] ;CHECK: %vec.ind.next = add <4 x i64> %vec.ind, <i64 4, i64 4, i64 4, i64 4> ;CHECK: %vec.ind.next2 = add <4 x i32> %vec.ind1, <i32 4, i32 4, i32 4, i32 4> ;CHECK: ret i32 |
