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| author | Sanjay Patel <spatel@rotateright.com> | 2017-06-27 17:53:22 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-06-27 17:53:22 +0000 |
| commit | 7227276d4144da8310496286b314fe33f1cfa51d (patch) | |
| tree | a0fe23a1fd36c2232f8a45bd50dac11d1b6accba /llvm/test/Transforms/LoopVectorize/if-conversion.ll | |
| parent | 874bc749a20f14d6fc30e43038b3c99d6c40c4a9 (diff) | |
| download | bcm5719-llvm-7227276d4144da8310496286b314fe33f1cfa51d.tar.gz bcm5719-llvm-7227276d4144da8310496286b314fe33f1cfa51d.zip | |
[InstCombine] canonicalize icmp predicate feeding select
This canonicalization was suggested in D33172 as a way to make InstCombine behavior more uniform.
We have this transform for icmp+br, so unless there's some reason that icmp+select should be
treated differently, we should do the same thing here.
The benefit comes from increasing the chances of creating identical instructions. This is shown in
the tests in logical-select.ll (PR32791). InstCombine doesn't fold those directly, but EarlyCSE
can simplify the identical cmps, and then InstCombine can fold the selects together.
The possible regression for the tests in select.ll raises questions about poison/undef:
http://lists.llvm.org/pipermail/llvm-dev/2017-May/113261.html
...but that transform is just as likely to be triggered by this canonicalization as it is to be
missed, so we're just pointing out a commutation deficiency in the pattern matching:
https://reviews.llvm.org/rL228409
Differential Revision: https://reviews.llvm.org/D34242
llvm-svn: 306435
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/if-conversion.ll')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/if-conversion.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/if-conversion.ll b/llvm/test/Transforms/LoopVectorize/if-conversion.ll index d3a16e2075d..ad50e0b00fc 100644 --- a/llvm/test/Transforms/LoopVectorize/if-conversion.ll +++ b/llvm/test/Transforms/LoopVectorize/if-conversion.ll @@ -18,7 +18,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 ;CHECK-LABEL: @function0( ;CHECK: load <4 x i32> -;CHECK: icmp sle <4 x i32> +;CHECK: icmp sgt <4 x i32> ;CHECK: mul <4 x i32> ;CHECK: add <4 x i32> ;CHECK: select <4 x i1> |
