diff options
author | Nicola Zaghen <nicola.zaghen@imgtec.com> | 2018-09-04 10:29:48 +0000 |
---|---|---|
committer | Nicola Zaghen <nicola.zaghen@imgtec.com> | 2018-09-04 10:29:48 +0000 |
commit | 9588ad9611368d65a6f619ae5e79fff70854a1fc (patch) | |
tree | f51068c83cdebf1b82bf5bdfd2512383917f2fb0 /llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll | |
parent | ef16ea7f7ade8dbe3647e7c829a13d1dbeee0f0e (diff) | |
download | bcm5719-llvm-9588ad9611368d65a6f619ae5e79fff70854a1fc.tar.gz bcm5719-llvm-9588ad9611368d65a6f619ae5e79fff70854a1fc.zip |
[InstCombine] Fold icmp ugt/ult (add nuw X, C2), C --> icmp ugt/ult X, (C - C2)
Support for sgt/slt was added in rL294898, this adds the same cases also for unsigned compares.
This is the Alive proof: https://rise4fun.com/Alive/nyY
Differential Revision: https://reviews.llvm.org/D50972
llvm-svn: 341353
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll')
-rw-r--r-- | llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll b/llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll index 311d92b94af..458e350a5e0 100644 --- a/llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll +++ b/llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll @@ -12,7 +12,7 @@ define i32 @foo(i32* nocapture %A, i32* nocapture %B, i32 %n) { ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 4 +; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 3 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] ; CHECK: vector.memcheck: ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[N]], -1 |