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author | Matthew Simpson <mssimpso@codeaurora.org> | 2016-10-07 15:20:13 +0000 |
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committer | Matthew Simpson <mssimpso@codeaurora.org> | 2016-10-07 15:20:13 +0000 |
commit | a371c14ffe5de634e74c9654444804fb8a4b5eb5 (patch) | |
tree | a5a3b06e40ec0fc2da615d9ab48b784b6dfaef43 /llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll | |
parent | 9397cf953cd02ede85e84b37360ad87748fcefe0 (diff) | |
download | bcm5719-llvm-a371c14ffe5de634e74c9654444804fb8a4b5eb5.tar.gz bcm5719-llvm-a371c14ffe5de634e74c9654444804fb8a4b5eb5.zip |
[LV] Don't mark multi-use branch conditions uniform
Previously, we marked the branch conditions of latch blocks uniform after
vectorization if they were instructions contained in the loop. However, if a
condition instruction has users other than the branch, it may not remain
uniform. This patch ensures the conditions we mark uniform are only used by the
branch. This should fix PR30627.
Reference: https://llvm.org/bugs/show_bug.cgi?id=30627
llvm-svn: 283563
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll')
-rw-r--r-- | llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll b/llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll new file mode 100644 index 00000000000..f8d20c32bed --- /dev/null +++ b/llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll @@ -0,0 +1,35 @@ +; REQUIRES: asserts +; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -instcombine -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s + +target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" + +; CHECK-LABEL: more_than_one_use +; +; PR30627. Check that a compare instruction with more than one use is not +; recognized as uniform and is vectorized. +; +; CHECK-NOT: Found uniform instruction: %cond = icmp slt i64 %i.next, %n +; CHECK: vector.body +; CHECK: %[[I:.+]] = add nuw nsw <4 x i64> %vec.ind, <i64 1, i64 1, i64 1, i64 1> +; CHECK: icmp slt <4 x i64> %[[I]], %broadcast.splat +; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body +; +define i32 @more_than_one_use(i32* %a, i64 %n) { +entry: + br label %for.body + +for.body: + %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ] + %r = phi i32 [ %tmp3, %for.body ], [ 0, %entry ] + %i.next = add nuw nsw i64 %i, 1 + %cond = icmp slt i64 %i.next, %n + %tmp0 = select i1 %cond, i64 %i.next, i64 0 + %tmp1 = getelementptr inbounds i32, i32* %a, i64 %tmp0 + %tmp2 = load i32, i32* %tmp1, align 8 + %tmp3 = add i32 %r, %tmp2 + br i1 %cond, label %for.body, label %for.end + +for.end: + %tmp4 = phi i32 [ %tmp3, %for.body ] + ret i32 %tmp4 +} |