[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794

1 files changed, 3 insertions, 3 deletions

diff --git a/llvm/test/Transforms/LoopVectorize/cpp-new-array.ll b/llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
index cc41e5c47d8..22896d33428 100644
--- a/llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
+++ b/llvm/test/Transforms/LoopVectorize/cpp-new-array.ll
@@ -25,10 +25,10 @@ for.body:                                         ; preds = %entry, %for.body
   %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
   %idxprom = sext i32 %i.01 to i64
   %arrayidx = getelementptr inbounds float, float* %0, i64 %idxprom
-  %3 = load float* %arrayidx, align 4
+  %3 = load float, float* %arrayidx, align 4
   %idxprom5 = sext i32 %i.01 to i64
   %arrayidx6 = getelementptr inbounds float, float* %1, i64 %idxprom5
-  %4 = load float* %arrayidx6, align 4
+  %4 = load float, float* %arrayidx6, align 4
   %add = fadd float %3, %4
   %idxprom7 = sext i32 %i.01 to i64
   %arrayidx8 = getelementptr inbounds float, float* %2, i64 %idxprom7
@@ -38,7 +38,7 @@ for.body:                                         ; preds = %entry, %for.body
   br i1 %cmp, label %for.body, label %for.end
 
 for.end:                                          ; preds = %for.body
-  %5 = load float* %2, align 4
+  %5 = load float, float* %2, align 4
   %conv10 = fptosi float %5 to i32
   ret i32 %conv10
 }