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authorSimon Tatham <simon.tatham@arm.com>2019-07-02 11:26:11 +0000
committerSimon Tatham <simon.tatham@arm.com>2019-07-02 11:26:11 +0000
commitbffd099d158291ecd32413093e477ed10a7b35e5 (patch)
treecc84e8de2715362991b35e618bf41b4a5d721295 /llvm/test/Transforms/LoopVectorize/control-flow.ll
parent7b63a9533c7eba6e1402eebe6e03a54036df48cf (diff)
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[ARM] MVE: allow soft-float ABI to pass vector types.
Passing a vector type over the soft-float ABI involves it being split into four GPRs, so the first thing that has to happen at the start of the function is to recombine those into a vector register. The ABI types all vectors as v2f64, so we need to support BUILD_VECTOR for that type, which I do in this patch by allowing it to be expanded in terms of INSERT_VECTOR_ELT, and writing an ISel pattern for that in turn. Similarly, I provide a rule for EXTRACT_VECTOR_ELT so that a returned vector can be marshalled back into GPRs. While I'm here, I've also added ISD::UNDEF to the list of operations we turn back on in `setAllExpand`, because I noticed that otherwise it gets expanded into a BUILD_VECTOR with explicit zero inputs, leading to pointless machine instructions to zero out a vector register that's about to have every lane overwritten of in any case. Reviewers: dmgreen, ostannard Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63937 llvm-svn: 364910
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