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| author | Dorit Nuzman <dorit.nuzman@intel.com> | 2019-08-14 05:22:20 +0000 |
|---|---|---|
| committer | Dorit Nuzman <dorit.nuzman@intel.com> | 2019-08-14 05:22:20 +0000 |
| commit | 491ca2425d4a58bf1d732c5a051e5714a23ca198 (patch) | |
| tree | 462abb94f4317c583b2be1399db2f29818f9aae7 /llvm/test/Transforms/LoopVectorize/X86 | |
| parent | d4edd9d97e4e9200d885297c79b7e7b55961dae8 (diff) | |
| download | bcm5719-llvm-491ca2425d4a58bf1d732c5a051e5714a23ca198.tar.gz bcm5719-llvm-491ca2425d4a58bf1d732c5a051e5714a23ca198.zip | |
[LV] Fold-tail flag
This is the compiler-flag equivalent of the Predicate pragma
(https://reviews.llvm.org/D65197), to direct the vectorizer to fold the
remainder-loop into the main-loop using predication.
Differential Revision: https://reviews.llvm.org/D66108
Reviewers: Ayal, hsaito, fhahn, SjoerdMeije
llvm-svn: 368801
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/X86')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll b/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll index d7767385c78..eb0b499f512 100644 --- a/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll @@ -1,4 +1,5 @@ ; RUN: opt < %s -loop-vectorize -S | FileCheck %s +; RUN: opt < %s -loop-vectorize -prefer-predicate-over-epilog -S | FileCheck -check-prefix=PREDFLAG %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @@ -13,7 +14,15 @@ define dso_local void @tail_folding_enabled(i32* noalias nocapture %A, i32* noal ; CHECK: %index.next = add i64 %index, 8 ; CHECK: %12 = icmp eq i64 %index.next, 432 ; CHECK: br i1 %12, label %middle.block, label %vector.body, !llvm.loop !0 - +; PREDFLAG-LABEL: tail_folding_enabled( +; PREDFLAG: vector.body: +; PREDFLAG: %wide.masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32( +; PREDFLAG: %wide.masked.load1 = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32( +; PREDFLAG: %8 = add nsw <8 x i32> %wide.masked.load1, %wide.masked.load +; PREDFLAG: call void @llvm.masked.store.v8i32.p0v8i32( +; PREDFLAG: %index.next = add i64 %index, 8 +; PREDFLAG: %12 = icmp eq i64 %index.next, 432 +; PREDFLAG: br i1 %12, label %middle.block, label %vector.body, !llvm.loop !0 entry: br label %for.body @@ -40,6 +49,15 @@ define dso_local void @tail_folding_disabled(i32* noalias nocapture %A, i32* noa ; CHECK-NOT: @llvm.masked.load.v8i32.p0v8i32( ; CHECK-NOT: @llvm.masked.store.v8i32.p0v8i32( ; CHECK: br i1 %44, label {{.*}}, label %vector.body +; PREDFLAG-LABEL: tail_folding_disabled( +; PREDFLAG: vector.body: +; PREDFLAG: %wide.masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32( +; PREDFLAG: %wide.masked.load1 = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32( +; PREDFLAG: %8 = add nsw <8 x i32> %wide.masked.load1, %wide.masked.load +; PREDFLAG: call void @llvm.masked.store.v8i32.p0v8i32( +; PREDFLAG: %index.next = add i64 %index, 8 +; PREDFLAG: %12 = icmp eq i64 %index.next, 432 +; PREDFLAG: br i1 %12, label %middle.block, label %vector.body, !llvm.loop !4 entry: br label %for.body |
