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author | Nadav Rotem <nrotem@apple.com> | 2013-01-11 19:54:13 +0000 |
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committer | Nadav Rotem <nrotem@apple.com> | 2013-01-11 19:54:13 +0000 |
commit | e55aa3c848e4530815356b42b494aa089f093df5 (patch) | |
tree | c3f0999cea229ecfa6006137df0deee8f73cb587 /llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll | |
parent | 46afb351811ea3b3bab8120552be1200c8380415 (diff) | |
download | bcm5719-llvm-e55aa3c848e4530815356b42b494aa089f093df5.tar.gz bcm5719-llvm-e55aa3c848e4530815356b42b494aa089f093df5.zip |
ARM Cost Model: Modify the target independent cost model to ask
the target if it supports the different CAST types. We didn't do this
on X86 because of the different register sizes and types, but on ARM
this makes sense.
llvm-svn: 172245
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll')
-rw-r--r-- | llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll b/llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll index 6af4af6ebd8..6a68e81bcae 100644 --- a/llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll +++ b/llvm/test/Transforms/LoopVectorize/ARM/gcc-examples.ll @@ -35,9 +35,9 @@ define void @example1() nounwind uwtable ssp { } ;CHECK: @example10b -;CHECK: load <2 x i16> -;CHECK: sext <2 x i16> -;CHECK: store <2 x i32> +;CHECK: load <4 x i16> +;CHECK: sext <4 x i16> +;CHECK: store <4 x i32> ;CHECK: ret void define void @example10b(i16* noalias nocapture %sa, i16* noalias nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32* noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp { br label %1 |