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| author | Teresa Johnson <tejohnson@google.com> | 2017-07-01 03:24:08 +0000 |
|---|---|---|
| committer | Teresa Johnson <tejohnson@google.com> | 2017-07-01 03:24:08 +0000 |
| commit | eb4fba9d6173eb622e7a351090e380bd9de72ddb (patch) | |
| tree | 936e9db9d364428cfd602d1ce27e30e8e6bee94b /llvm/test/Transforms/LoopVectorize/AArch64 | |
| parent | de56903bde27fc257e66bdd525572b6c76dcb6f3 (diff) | |
| download | bcm5719-llvm-eb4fba9d6173eb622e7a351090e380bd9de72ddb.tar.gz bcm5719-llvm-eb4fba9d6173eb622e7a351090e380bd9de72ddb.zip | |
re-commit r306336: Enable vectorizer-maximize-bandwidth by default.
Differential Revision: https://reviews.llvm.org/D33341
llvm-svn: 306935
Diffstat (limited to 'llvm/test/Transforms/LoopVectorize/AArch64')
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll | 32 | ||||
| -rw-r--r-- | llvm/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll | 16 |
2 files changed, 24 insertions, 24 deletions
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll b/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll index 1149afe7b9f..4cdf76b9b44 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll @@ -88,9 +88,9 @@ for.body: ; preds = %entry, %for.body } ; CHECK-LABEL: @add_c( -; CHECK: load <8 x i8>, <8 x i8>* -; CHECK: add <8 x i16> -; CHECK: store <8 x i16> +; CHECK: load <16 x i8>, <16 x i8>* +; CHECK: add <16 x i16> +; CHECK: store <16 x i16> ; Function Attrs: nounwind define void @add_c(i8* noalias nocapture readonly %p, i16* noalias nocapture %q, i32 %len) #0 { entry: @@ -116,9 +116,9 @@ for.body: ; preds = %entry, %for.body } ; CHECK-LABEL: @add_d( -; CHECK: load <4 x i16> -; CHECK: add nsw <4 x i32> -; CHECK: store <4 x i32> +; CHECK: load <8 x i16> +; CHECK: add nsw <8 x i32> +; CHECK: store <8 x i32> define void @add_d(i16* noalias nocapture readonly %p, i32* noalias nocapture %q, i32 %len) #0 { entry: %cmp7 = icmp sgt i32 %len, 0 @@ -187,16 +187,16 @@ for.body: ; preds = %for.body, %for.body } ; CHECK-LABEL: @add_f -; CHECK: load <8 x i16> -; CHECK: trunc <8 x i16> -; CHECK: shl <8 x i8> -; CHECK: add <8 x i8> -; CHECK: or <8 x i8> -; CHECK: mul <8 x i8> -; CHECK: and <8 x i8> -; CHECK: xor <8 x i8> -; CHECK: mul <8 x i8> -; CHECK: store <8 x i8> +; CHECK: load <16 x i16> +; CHECK: trunc <16 x i16> +; CHECK: shl <16 x i8> +; CHECK: add <16 x i8> +; CHECK: or <16 x i8> +; CHECK: mul <16 x i8> +; CHECK: and <16 x i8> +; CHECK: xor <16 x i8> +; CHECK: mul <16 x i8> +; CHECK: store <16 x i8> define void @add_f(i16* noalias nocapture readonly %p, i8* noalias nocapture %q, i8 %arg1, i8 %arg2, i32 %len) #0 { entry: %cmp.32 = icmp sgt i32 %len, 0 diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll b/llvm/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll index 9d9aea00e9a..2c3d0591954 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll @@ -123,16 +123,16 @@ for.body: ; } ; ; CHECK: vector.body: -; CHECK: phi <8 x i16> -; CHECK: [[Ld1:%[a-zA-Z0-9.]+]] = load <8 x i8> -; CHECK: zext <8 x i8> [[Ld1]] to <8 x i16> -; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <8 x i8> -; CHECK: zext <8 x i8> [[Ld2]] to <8 x i16> -; CHECK: add <8 x i16> -; CHECK: add <8 x i16> +; CHECK: phi <16 x i16> +; CHECK: [[Ld1:%[a-zA-Z0-9.]+]] = load <16 x i8> +; CHECK: zext <16 x i8> [[Ld1]] to <16 x i16> +; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <16 x i8> +; CHECK: zext <16 x i8> [[Ld2]] to <16 x i16> +; CHECK: add <16 x i16> +; CHECK: add <16 x i16> ; ; CHECK: middle.block: -; CHECK: [[Rdx:%[a-zA-Z0-9.]+]] = call i16 @llvm.experimental.vector.reduce.add.i16.v8i16(<8 x i16> +; CHECK: [[Rdx:%[a-zA-Z0-9.]+]] = call i16 @llvm.experimental.vector.reduce.add.i16.v16i16(<16 x i16> ; CHECK: zext i16 [[Rdx]] to i32 ; define i16 @reduction_i16_2(i8* nocapture readonly %a, i8* nocapture readonly %b, i32 %n) { |
