diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2014-04-12 00:59:48 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-04-12 00:59:48 +0000 |
| commit | c3998306f40dd69727f36c5a1d0a463fa0b96ea8 (patch) | |
| tree | da1a81cba36edab5ea9d12cee2436a3e16fc5261 /llvm/test/Transforms/LoopStrengthReduce/X86 | |
| parent | b1966291de338ceb577205a0dc73df41ea2bd753 (diff) | |
| download | bcm5719-llvm-c3998306f40dd69727f36c5a1d0a463fa0b96ea8.tar.gz bcm5719-llvm-c3998306f40dd69727f36c5a1d0a463fa0b96ea8.zip | |
Add the ability to use GEPs for address sinking in CGP
The current memory-instruction optimization logic in CGP, which sinks parts of
the address computation that can be adsorbed by the addressing mode, does this
by explicitly converting the relevant part of the address computation into
IR-level integer operations (making use of ptrtoint and inttoptr). For most
targets this is currently not a problem, but for targets wishing to make use of
IR-level aliasing analysis during CodeGen, the use of ptrtoint/inttoptr is a
problem for two reasons:
1. BasicAA becomes less powerful in the face of the ptrtoint/inttoptr
2. In cases where type-punning was used, and BasicAA was used
to override TBAA, BasicAA may no longer do so. (this had forced us to disable
all use of TBAA in CodeGen; something which we can now enable again)
This (use of GEPs instead of ptrtoint/inttoptr) is not currently enabled by
default (except for those targets that use AA during CodeGen), and so aside
from some PowerPC subtargets and SystemZ, there should be no change in
behavior. We may be able to switch completely away from the ptrtoint/inttoptr
sinking on all targets, but further testing is required.
I've doubled-up on a number of existing tests that are sensitive to the
address sinking behavior (including some store-merging tests that are
sensitive to the order of the resulting ADD operations at the SDAG level).
llvm-svn: 206092
Diffstat (limited to 'llvm/test/Transforms/LoopStrengthReduce/X86')
| -rw-r--r-- | llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll index e42b67fd35a..937791dca41 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/X86/ivchain-X86.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -O3 -march=x86-64 -mcpu=core2 | FileCheck %s -check-prefix=X64 ; RUN: llc < %s -O3 -march=x86 -mcpu=core2 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -O3 -march=x86-64 -mcpu=core2 -addr-sink-using-gep=1 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -O3 -march=x86 -mcpu=core2 -addr-sink-using-gep=1 | FileCheck %s -check-prefix=X32 ; @simple is the most basic chain of address induction variables. Chaining ; saves at least one register and avoids complex addressing and setup |
