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| author | Alina Sbirlea <asbirlea@google.com> | 2016-07-01 21:44:12 +0000 |
|---|---|---|
| committer | Alina Sbirlea <asbirlea@google.com> | 2016-07-01 21:44:12 +0000 |
| commit | 8d8aa5dd6ce3c427fa0cf057acfc7ad4aef193dd (patch) | |
| tree | 4a6daaa31e920236e7e11832a7022bf2f694dd27 /llvm/test/Transforms/LoadStoreVectorizer/AMDGPU | |
| parent | c7bb34f6ec9714ee717ca2166e06aae2c34e9041 (diff) | |
| download | bcm5719-llvm-8d8aa5dd6ce3c427fa0cf057acfc7ad4aef193dd.tar.gz bcm5719-llvm-8d8aa5dd6ce3c427fa0cf057acfc7ad4aef193dd.zip | |
Address two correctness issues in LoadStoreVectorizer
Summary:
GetBoundryInstruction returns the last instruction as the instruction which follows or end(). Otherwise the last instruction in the boundry set is not being tested by isVectorizable().
Partially solve reordering of instructions. More extensive solution to follow.
Reviewers: tstellarAMD, llvm-commits, jlebar
Subscribers: escha, arsenm, mzolotukhin
Differential Revision: http://reviews.llvm.org/D21934
llvm-svn: 274389
Diffstat (limited to 'llvm/test/Transforms/LoadStoreVectorizer/AMDGPU')
| -rw-r--r-- | llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll b/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll index 8b8019c7482..4d6240a9aa9 100644 --- a/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll +++ b/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll @@ -2,11 +2,11 @@ target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" -; This is OK to vectorize the load as long as the may alias store -; occurs before the vector load. +; This is NOT OK to vectorize, as either load may alias either store. +; CHECK: load double ; CHECK: store double 0.000000e+00, double addrspace(1)* %a, -; CHECK: load <2 x double> +; CHECK: load double ; CHECK: store double 0.000000e+00, double addrspace(1)* %a.idx.1 define void @interleave(double addrspace(1)* nocapture %a, double addrspace(1)* nocapture %b, double addrspace(1)* nocapture readonly %c) #0 { entry: |
