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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/Transforms/LoadCombine/load-combine-assume.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/Transforms/LoadCombine/load-combine-assume.ll')
| -rw-r--r-- | llvm/test/Transforms/LoadCombine/load-combine-assume.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/Transforms/LoadCombine/load-combine-assume.ll b/llvm/test/Transforms/LoadCombine/load-combine-assume.ll index ff0a0d318d4..2d6d160f12f 100644 --- a/llvm/test/Transforms/LoadCombine/load-combine-assume.ll +++ b/llvm/test/Transforms/LoadCombine/load-combine-assume.ll @@ -8,14 +8,14 @@ declare void @llvm.assume(i1) nounwind define i64 @test1(i32* nocapture readonly %a, i1 %b) { ; CHECK-LABEL: @test1 -; CHECK-DAG: load i64* %1, align 4 +; CHECK-DAG: load i64, i64* %1, align 4 ; CHECK-DAG: tail call void @llvm.assume(i1 %b) ; CHECK: ret i64 - %load1 = load i32* %a, align 4 + %load1 = load i32, i32* %a, align 4 %conv = zext i32 %load1 to i64 %arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1 - %load2 = load i32* %arrayidx1, align 4 + %load2 = load i32, i32* %arrayidx1, align 4 tail call void @llvm.assume(i1 %b) %conv2 = zext i32 %load2 to i64 %shl = shl nuw i64 %conv2, 32 @@ -27,15 +27,15 @@ define i64 @test1(i32* nocapture readonly %a, i1 %b) { define i64 @test2(i32* nocapture readonly %a, i1 %b) { ; CHECK-LABEL: @test2 -; CHECK-DAG: load i64* %1, align 4 +; CHECK-DAG: load i64, i64* %1, align 4 ; CHECK-DAG: tail call void @llvm.assume(i1 %b) ; CHECK: ret i64 - %load1 = load i32* %a, align 4 + %load1 = load i32, i32* %a, align 4 %conv = zext i32 %load1 to i64 %arrayidx1 = getelementptr inbounds i32, i32* %a, i64 1 tail call void @llvm.assume(i1 %b) - %load2 = load i32* %arrayidx1, align 4 + %load2 = load i32, i32* %arrayidx1, align 4 %conv2 = zext i32 %load2 to i64 %shl = shl nuw i64 %conv2, 32 %add = or i64 %shl, %conv |
