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authorHiroshi Inoue <inouehrs@jp.ibm.com>2018-07-27 07:21:02 +0000
committerHiroshi Inoue <inouehrs@jp.ibm.com>2018-07-27 07:21:02 +0000
commiteeab694cea440fde55e11cdb07a84cdecf561c52 (patch)
tree899134446cdd97c483ab1a80d73da184f6ea07ab /llvm/test/Transforms/InstSimplify/shift.ll
parent03948d0e0f2954fb93de7fdc4d5c30f90fdd684f (diff)
downloadbcm5719-llvm-eeab694cea440fde55e11cdb07a84cdecf561c52.tar.gz
bcm5719-llvm-eeab694cea440fde55e11cdb07a84cdecf561c52.zip
[InstSimplify] tests for D48828: fold extraction from std::pair
This commit includes unit tests for D48828, which enhances InstSimplify to enable jump threading with a method whose return type is std::pair<int, bool> or std::pair<bool, int>. I am going to commit the actual transformation later. llvm-svn: 338107
Diffstat (limited to 'llvm/test/Transforms/InstSimplify/shift.ll')
-rw-r--r--llvm/test/Transforms/InstSimplify/shift.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstSimplify/shift.ll b/llvm/test/Transforms/InstSimplify/shift.ll
index d080cbc6212..7a09ef97151 100644
--- a/llvm/test/Transforms/InstSimplify/shift.ll
+++ b/llvm/test/Transforms/InstSimplify/shift.ll
@@ -175,3 +175,41 @@ define <2 x i8> @shl_by_sext_bool_vec(<2 x i1> %x, <2 x i8> %y) {
ret <2 x i8> %r
}
+define i32 @shl_or_shr(i32 %a, i32 %b) {
+; CHECK-LABEL: @shl_or_shr(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP1]], 32
+; CHECK-NEXT: [[TMP4:%.*]] = or i64 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP4]], 32
+; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i32
+; CHECK-NEXT: ret i32 [[TMP6]]
+;
+ %tmp1 = zext i32 %a to i64
+ %tmp2 = zext i32 %b to i64
+ %tmp3 = shl nuw i64 %tmp1, 32
+ %tmp4 = or i64 %tmp2, %tmp3
+ %tmp5 = lshr i64 %tmp4, 32
+ %tmp6 = trunc i64 %tmp5 to i32
+ ret i32 %tmp6
+}
+
+define i32 @shl_or_shr2(i32 %a, i32 %b) {
+; Since shift count of shl is smaller than the size of %b, OR cannot be eliminated.
+; CHECK-LABEL: @shl_or_shr2(
+; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP1]], 31
+; CHECK-NEXT: [[TMP4:%.*]] = or i64 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP4]], 31
+; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i32
+; CHECK-NEXT: ret i32 [[TMP6]]
+;
+ %tmp1 = zext i32 %a to i64
+ %tmp2 = zext i32 %b to i64
+ %tmp3 = shl nuw i64 %tmp1, 31
+ %tmp4 = or i64 %tmp2, %tmp3
+ %tmp5 = lshr i64 %tmp4, 31
+ %tmp6 = trunc i64 %tmp5 to i32
+ ret i32 %tmp6
+}
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