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| author | Sanjay Patel <spatel@rotateright.com> | 2018-04-21 16:23:47 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-04-21 16:23:47 +0000 |
| commit | d0b27a1156fc7e21227c55702c2940ab25a7a99e (patch) | |
| tree | ec839c24acd738634e2eb796e8183f8e7e8288dd /llvm/test/Transforms/InstSimplify/negate.ll | |
| parent | 44278f65984613fb06b700fb27aa5d5951d977d9 (diff) | |
| download | bcm5719-llvm-d0b27a1156fc7e21227c55702c2940ab25a7a99e.tar.gz bcm5719-llvm-d0b27a1156fc7e21227c55702c2940ab25a7a99e.zip | |
[InstSimplify] move/add/regenerate checks for tests; NFC
llvm-svn: 330515
Diffstat (limited to 'llvm/test/Transforms/InstSimplify/negate.ll')
| -rw-r--r-- | llvm/test/Transforms/InstSimplify/negate.ll | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/llvm/test/Transforms/InstSimplify/negate.ll b/llvm/test/Transforms/InstSimplify/negate.ll index 17eb52d3527..49653cea263 100644 --- a/llvm/test/Transforms/InstSimplify/negate.ll +++ b/llvm/test/Transforms/InstSimplify/negate.ll @@ -17,6 +17,15 @@ define <2 x i32> @negate_nuw_vec(<2 x i32> %x) { ret <2 x i32> %neg } +define <2 x i32> @negate_nuw_vec_undef_elt(<2 x i32> %x) { +; CHECK-LABEL: @negate_nuw_vec_undef_elt( +; CHECK-NEXT: [[NEG:%.*]] = sub nuw <2 x i32> <i32 0, i32 undef>, [[X:%.*]] +; CHECK-NEXT: ret <2 x i32> [[NEG]] +; + %neg = sub nuw <2 x i32> <i32 0, i32 undef>, %x + ret <2 x i32> %neg +} + define i8 @negate_zero_or_minsigned_nsw(i8 %x) { ; CHECK-LABEL: @negate_zero_or_minsigned_nsw( ; CHECK-NEXT: ret i8 0 @@ -35,9 +44,20 @@ define <2 x i8> @negate_zero_or_minsigned_nsw_vec(<2 x i8> %x) { ret <2 x i8> %neg } +define <2 x i8> @negate_zero_or_minsigned_nsw_vec_undef_elt(<2 x i8> %x) { +; CHECK-LABEL: @negate_zero_or_minsigned_nsw_vec_undef_elt( +; CHECK-NEXT: [[SIGNBIT:%.*]] = shl <2 x i8> [[X:%.*]], <i8 7, i8 7> +; CHECK-NEXT: [[NEG:%.*]] = sub nsw <2 x i8> <i8 undef, i8 0>, [[SIGNBIT]] +; CHECK-NEXT: ret <2 x i8> [[NEG]] +; + %signbit = shl <2 x i8> %x, <i8 7, i8 7> + %neg = sub nsw <2 x i8> <i8 undef, i8 0>, %signbit + ret <2 x i8> %neg +} + define i8 @negate_zero_or_minsigned(i8 %x) { ; CHECK-LABEL: @negate_zero_or_minsigned( -; CHECK-NEXT: [[SIGNBIT:%.*]] = shl i8 %x, 7 +; CHECK-NEXT: [[SIGNBIT:%.*]] = shl i8 [[X:%.*]], 7 ; CHECK-NEXT: ret i8 [[SIGNBIT]] ; %signbit = shl i8 %x, 7 @@ -47,7 +67,7 @@ define i8 @negate_zero_or_minsigned(i8 %x) { define <2 x i8> @negate_zero_or_minsigned_vec(<2 x i8> %x) { ; CHECK-LABEL: @negate_zero_or_minsigned_vec( -; CHECK-NEXT: [[SIGNBIT:%.*]] = and <2 x i8> %x, <i8 -128, i8 -128> +; CHECK-NEXT: [[SIGNBIT:%.*]] = and <2 x i8> [[X:%.*]], <i8 -128, i8 -128> ; CHECK-NEXT: ret <2 x i8> [[SIGNBIT]] ; %signbit = and <2 x i8> %x, <i8 128, i8 128> |
