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| author | Sanjay Patel <spatel@rotateright.com> | 2016-08-18 14:10:48 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-08-18 14:10:48 +0000 |
| commit | 4c5e60d95ce6344ea431246e5467f02404f36d9a (patch) | |
| tree | 3683b924ccaf5b80ae74c0ecdad97b1f1846bd4b /llvm/test/Transforms/InstCombine | |
| parent | ab7c46eccf68fcd6c7ec2a68359102b0827fb7fa (diff) | |
| download | bcm5719-llvm-4c5e60d95ce6344ea431246e5467f02404f36d9a.tar.gz bcm5719-llvm-4c5e60d95ce6344ea431246e5467f02404f36d9a.zip | |
[InstCombine] use m_APInt to allow icmp (xor X, Y), C folds for splat constant vectors
This is a sibling of:
https://reviews.llvm.org/rL278859
https://reviews.llvm.org/rL278935
https://reviews.llvm.org/rL278945
llvm-svn: 279066
Diffstat (limited to 'llvm/test/Transforms/InstCombine')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll | 8 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/icmp.ll | 8 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/vec_sext.ll | 2 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/xor2.ll | 4 |
4 files changed, 6 insertions, 16 deletions
diff --git a/llvm/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll b/llvm/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll index c75fbd84c24..b91457c79de 100644 --- a/llvm/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll +++ b/llvm/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll @@ -33,11 +33,9 @@ define i1 @test3(i8 %x) { ret i1 %tmp } -; FIXME: Vectors should fold too. define <2 x i1> @test3vec(<2 x i8> %x) { ; CHECK-LABEL: @test3vec( -; CHECK-NEXT: [[X:%.*]] = xor <2 x i8> %x, <i8 -128, i8 -128> -; CHECK-NEXT: [[TMP:%.*]] = icmp ugt <2 x i8> [[X]], <i8 14, i8 14> +; CHECK-NEXT: [[TMP:%.*]] = icmp sgt <2 x i8> %x, <i8 -114, i8 -114> ; CHECK-NEXT: ret <2 x i1> [[TMP]] ; %X = xor <2 x i8> %x, <i8 128, i8 128> @@ -77,11 +75,9 @@ define i1 @test6(i8 %x) { ret i1 %tmp } -; FIXME: Vectors should fold too. define <2 x i1> @test6vec(<2 x i8> %x) { ; CHECK-LABEL: @test6vec( -; CHECK-NEXT: [[X:%.*]] = xor <2 x i8> %x, <i8 127, i8 127> -; CHECK-NEXT: [[TMP:%.*]] = icmp ugt <2 x i8> [[X]], <i8 14, i8 14> +; CHECK-NEXT: [[TMP:%.*]] = icmp slt <2 x i8> %x, <i8 113, i8 113> ; CHECK-NEXT: ret <2 x i1> [[TMP]] ; %X = xor <2 x i8> %x, <i8 127, i8 127> diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll index db656f45bf2..0dbd386adf0 100644 --- a/llvm/test/Transforms/InstCombine/icmp.ll +++ b/llvm/test/Transforms/InstCombine/icmp.ll @@ -1882,11 +1882,9 @@ define i1 @icmp_sub_-1_X_ult_4(i32 %X) { ret i1 %cmp } -; FIXME: Vectors should fold too. define <2 x i1> @icmp_xor_neg4_X_ult_4_vec(<2 x i32> %X) { ; CHECK-LABEL: @icmp_xor_neg4_X_ult_4_vec( -; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> %X, <i32 -4, i32 -4> -; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[XOR]], <i32 4, i32 4> +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> %X, <i32 -5, i32 -5> ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %xor = xor <2 x i32> %X, <i32 -4, i32 -4> @@ -1904,11 +1902,9 @@ define i1 @icmp_sub_-1_X_uge_4(i32 %X) { ret i1 %cmp } -; FIXME: Vectors should fold too. define <2 x i1> @icmp_xor_neg4_X_uge_4_vec(<2 x i32> %X) { ; CHECK-LABEL: @icmp_xor_neg4_X_uge_4_vec( -; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> %X, <i32 -4, i32 -4> -; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[XOR]], <i32 3, i32 3> +; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> %X, <i32 -4, i32 -4> ; CHECK-NEXT: ret <2 x i1> [[CMP]] ; %xor = xor <2 x i32> %X, <i32 -4, i32 -4> diff --git a/llvm/test/Transforms/InstCombine/vec_sext.ll b/llvm/test/Transforms/InstCombine/vec_sext.ll index 6fcf51445ea..be808e902ab 100644 --- a/llvm/test/Transforms/InstCombine/vec_sext.ll +++ b/llvm/test/Transforms/InstCombine/vec_sext.ll @@ -26,8 +26,8 @@ define <4 x i32> @psignd_3(<4 x i32> %a, <4 x i32> %b) { define <4 x i32> @test1(<4 x i32> %a, <4 x i32> %b) { ; CHECK-LABEL: @test1( ; CHECK-NEXT: [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31> -; CHECK-NEXT: [[B_LOBIT_NOT:%.*]] = xor <4 x i32> [[B_LOBIT]], <i32 -1, i32 -1, i32 -1, i32 -1> ; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, %a +; CHECK-NEXT: [[B_LOBIT_NOT:%.*]] = xor <4 x i32> [[B_LOBIT]], <i32 -1, i32 -1, i32 -1, i32 -1> ; CHECK-NEXT: [[T2:%.*]] = and <4 x i32> [[B_LOBIT]], %a ; CHECK-NEXT: [[T3:%.*]] = and <4 x i32> [[B_LOBIT_NOT]], [[SUB]] ; CHECK-NEXT: [[COND:%.*]] = or <4 x i32> [[T2]], [[T3]] diff --git a/llvm/test/Transforms/InstCombine/xor2.ll b/llvm/test/Transforms/InstCombine/xor2.ll index 5bd6bf6808f..7969d8f3a9a 100644 --- a/llvm/test/Transforms/InstCombine/xor2.ll +++ b/llvm/test/Transforms/InstCombine/xor2.ll @@ -12,11 +12,9 @@ define i1 @test0(i32 %A) { ret i1 %C } -; FIXME: Vectors should fold too. define <2 x i1> @test0vec(<2 x i32> %A) { ; CHECK-LABEL: @test0vec( -; CHECK-NEXT: [[B:%.*]] = xor <2 x i32> %A, <i32 -2147483648, i32 -2147483648> -; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[B]], <i32 -1, i32 -1> +; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> %A, zeroinitializer ; CHECK-NEXT: ret <2 x i1> [[C]] ; %B = xor <2 x i32> %A, <i32 -2147483648, i32 -2147483648> |

