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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2015-02-13 16:33:34 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2015-02-13 16:33:34 +0000 |
| commit | 30d471f6aa34731861e892ee2652380d2c4617c3 (patch) | |
| tree | c05a6533a355d13725917eeae7ae06b6e27a9eed /llvm/test/Transforms/InstCombine | |
| parent | 7ce96b853dffeca7e37c78fa4a02fe8415b3ab9b (diff) | |
| download | bcm5719-llvm-30d471f6aa34731861e892ee2652380d2c4617c3.tar.gz bcm5719-llvm-30d471f6aa34731861e892ee2652380d2c4617c3.zip | |
[InstCombine] Fix regression introduced at r227197.
This patch fixes a problem I accidentally introduced in an instruction combine
on select instructions added at r227197. That revision taught the instruction
combiner how to fold a cttz/ctlz followed by a icmp plus select into a single
cttz/ctlz with flag 'is_zero_undef' cleared.
However, the new rule added at r227197 would have produced wrong results in the
case where a cttz/ctlz with flag 'is_zero_undef' cleared was follwed by a
zero-extend or truncate. In that case, the folded instruction would have
been inserted in a wrong location thus leaving the CFG in an inconsistent
state.
This patch fixes the problem and add two reproducible test cases to
existing test 'InstCombine/select-cmp-cttz-ctlz.ll'.
llvm-svn: 229124
Diffstat (limited to 'llvm/test/Transforms/InstCombine')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll b/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll index 390e6bc51f8..894bf6db0a4 100644 --- a/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll +++ b/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll @@ -292,6 +292,33 @@ entry: ret i16 %cond } +define i64 @select_bug1(i32 %x) { +; CHECK-LABEL: @select_bug1( +; CHECK: [[VAR1:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false) +; CHECK-NEXT: [[VAR2:%[a-zA-Z0-9]+]] = zext i32 [[VAR1]] to i64 +; CHECK-NEXT: ret i64 [[VAR2]] +entry: + %0 = tail call i32 @llvm.cttz.i32(i32 %x, i1 false) + %conv = zext i32 %0 to i64 + %tobool = icmp ne i32 %x, 0 + %cond = select i1 %tobool, i64 %conv, i64 32 + ret i64 %cond +} + +define i16 @select_bug2(i32 %x) { +; CHECK-LABEL: @select_bug2( +; CHECK: [[VAR1:%[a-zA-Z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %x, i1 false) +; CHECK-NEXT: [[VAR2:%[a-zA-Z0-9]+]] = trunc i32 [[VAR1]] to i16 +; CHECK-NEXT: ret i16 [[VAR2]] +entry: + %0 = tail call i32 @llvm.cttz.i32(i32 %x, i1 false) + %conv = trunc i32 %0 to i16 + %tobool = icmp ne i32 %x, 0 + %cond = select i1 %tobool, i16 %conv, i16 32 + ret i16 %cond +} + + declare i16 @llvm.ctlz.i16(i16, i1) declare i32 @llvm.ctlz.i32(i32, i1) declare i64 @llvm.ctlz.i64(i64, i1) |
