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| author | Sanjay Patel <spatel@rotateright.com> | 2018-09-28 15:24:41 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-09-28 15:24:41 +0000 |
| commit | 242f90fe82ef60e7dc4629961f7c732ccf5e69f8 (patch) | |
| tree | 232e044dea1487e7896bbd1e3de763cf39125106 /llvm/test/Transforms/InstCombine/vec_shuffle.ll | |
| parent | 699ee504f6448516d1fe89f8f56a61584b774a4a (diff) | |
| download | bcm5719-llvm-242f90fe82ef60e7dc4629961f7c732ccf5e69f8.tar.gz bcm5719-llvm-242f90fe82ef60e7dc4629961f7c732ccf5e69f8.zip | |
[InstCombine] don't propagate wider shufflevector arguments to predecessors
InstCombine would propagate shufflevector insts that had wider output vectors onto
predecessors, which would sometimes push undef's onto the divisor of a div/rem and
result in bad codegen.
I've fixed this by just banning propagating shufflevector back if the result of
the shufflevector is wider than the input vectors.
Patch by: @sheredom (Neil Henning)
Differential Revision: https://reviews.llvm.org/D52548
llvm-svn: 343329
Diffstat (limited to 'llvm/test/Transforms/InstCombine/vec_shuffle.ll')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/vec_shuffle.ll | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle.ll b/llvm/test/Transforms/InstCombine/vec_shuffle.ll index 352be09a28a..ce323a40eb2 100644 --- a/llvm/test/Transforms/InstCombine/vec_shuffle.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle.ll @@ -184,14 +184,15 @@ define <2 x i8> @test13a(i8 %x1, i8 %x2) { ret <2 x i8> %D } -; TODO: Increasing length of vector ops is not a good canonicalization. - +; Increasing length of vector ops is not a good canonicalization. + define <3 x i32> @add_wider(i32 %y, i32 %z) { -; CHECK-LABEL: @add( -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i32> undef, i32 [[Y:%.*]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i32> [[TMP1]], i32 [[Z:%.*]], i32 1 -; CHECK-NEXT: [[TMP3:%.*]] = add <3 x i32> [[TMP2]], <i32 255, i32 255, i32 undef> -; CHECK-NEXT: ret <3 x i32> [[TMP3]] +; CHECK-LABEL: @add_wider( +; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[I1]], <i32 255, i32 255> +; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> undef, <3 x i32> <i32 0, i32 1, i32 undef> +; CHECK-NEXT: ret <3 x i32> [[EXT]] ; %i0 = insertelement <2 x i32> undef, i32 %y, i32 0 %i1 = insertelement <2 x i32> %i0, i32 %z, i32 1 @@ -200,11 +201,15 @@ define <3 x i32> @add_wider(i32 %y, i32 %z) { ret <3 x i32> %ext } -; FIXME: Increasing length of vector ops must be safe from illegal undef propagation. +; Increasing length of vector ops must be safe from illegal undef propagation. define <3 x i32> @div_wider(i32 %y, i32 %z) { -; CHECK-LABEL: @div( -; CHECK-NEXT: ret <3 x i32> undef +; CHECK-LABEL: @div_wider( +; CHECK-NEXT: [[I0:%.*]] = insertelement <2 x i32> undef, i32 [[Y:%.*]], i32 0 +; CHECK-NEXT: [[I1:%.*]] = insertelement <2 x i32> [[I0]], i32 [[Z:%.*]], i32 1 +; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i32> [[I1]], <i32 255, i32 255> +; CHECK-NEXT: [[EXT:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> undef, <3 x i32> <i32 0, i32 1, i32 undef> +; CHECK-NEXT: ret <3 x i32> [[EXT]] ; %i0 = insertelement <2 x i32> undef, i32 %y, i32 0 %i1 = insertelement <2 x i32> %i0, i32 %z, i32 1 |
