summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/InstCombine/sub.ll
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2017-02-03 21:43:34 +0000
committerSanjay Patel <spatel@rotateright.com>2017-02-03 21:43:34 +0000
commit73fc8ddb065112fbb7cad1453774ed96bbb7d6e3 (patch)
treeba2c3ab04aba252f1c73bad9b5a480c056530f0f /llvm/test/Transforms/InstCombine/sub.ll
parent25324313325e906368fafd142bc6138c231e0b44 (diff)
downloadbcm5719-llvm-73fc8ddb065112fbb7cad1453774ed96bbb7d6e3.tar.gz
bcm5719-llvm-73fc8ddb065112fbb7cad1453774ed96bbb7d6e3.zip
[InstCombine] fix operand-complexity-based canonicalization (PR28296)
The code comments didn't match the code logic, and we didn't actually distinguish the fake unary (not/neg/fneg) operators from arguments. Adding another level to the weighting scheme provides more structure and can help simplify the pattern matching in InstCombine and other places. I fixed regressions that would have shown up from this change in: rL290067 rL290127 But that doesn't mean there are no pattern-matching logic holes left; some combines may just be missing regression tests. Should fix: https://llvm.org/bugs/show_bug.cgi?id=28296 Differential Revision: https://reviews.llvm.org/D27933 llvm-svn: 294049
Diffstat (limited to 'llvm/test/Transforms/InstCombine/sub.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/sub.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/Transforms/InstCombine/sub.ll b/llvm/test/Transforms/InstCombine/sub.ll
index 32541f1f893..e73461d1018 100644
--- a/llvm/test/Transforms/InstCombine/sub.ll
+++ b/llvm/test/Transforms/InstCombine/sub.ll
@@ -54,7 +54,7 @@ define i32 @test5(i32 %A, i32 %B, i32 %C) {
define i32 @test6(i32 %A, i32 %B) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[B_NOT:%.*]] = xor i32 %B, -1
-; CHECK-NEXT: [[D:%.*]] = and i32 %A, [[B_NOT]]
+; CHECK-NEXT: [[D:%.*]] = and i32 [[B_NOT]], %A
; CHECK-NEXT: ret i32 [[D]]
;
%C = and i32 %A, %B
@@ -617,7 +617,7 @@ define i32 @test45(i32 %x, i32 %y) {
define i32 @test46(i32 %x, i32 %y) {
; CHECK-LABEL: @test46(
; CHECK-NEXT: [[X_NOT:%.*]] = xor i32 %x, -1
-; CHECK-NEXT: [[SUB:%.*]] = and i32 %y, [[X_NOT]]
+; CHECK-NEXT: [[SUB:%.*]] = and i32 [[X_NOT]], %y
; CHECK-NEXT: ret i32 [[SUB]]
;
%or = or i32 %x, %y
OpenPOWER on IntegriCloud