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authorSanjay Patel <spatel@rotateright.com>2016-07-16 16:27:58 +0000
committerSanjay Patel <spatel@rotateright.com>2016-07-16 16:27:58 +0000
commit972a53fb422c13daf7383f534ada9e1a2e839aa1 (patch)
tree84afeea3daf14b1d3b11ac6bac4798629c149f2c /llvm/test/Transforms/InstCombine/signext.ll
parent309f98ef3a8d898cef5d767e06078098dbe8d0d1 (diff)
downloadbcm5719-llvm-972a53fb422c13daf7383f534ada9e1a2e839aa1.tar.gz
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auto-generate checks
llvm-svn: 275686
Diffstat (limited to 'llvm/test/Transforms/InstCombine/signext.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/signext.ll101
1 files changed, 54 insertions, 47 deletions
diff --git a/llvm/test/Transforms/InstCombine/signext.ll b/llvm/test/Transforms/InstCombine/signext.ll
index 3a714d7046d..bccadeb396f 100644
--- a/llvm/test/Transforms/InstCombine/signext.ll
+++ b/llvm/test/Transforms/InstCombine/signext.ll
@@ -1,78 +1,85 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128:n8:16:32:64"
define i32 @test1(i32 %x) {
- %tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
- %tmp.2 = xor i32 %tmp.1, -32768 ; <i32> [#uses=1]
- %tmp.3 = add i32 %tmp.2, 32768 ; <i32> [#uses=1]
- ret i32 %tmp.3
; CHECK-LABEL: @test1(
-; CHECK: %sext = shl i32 %x, 16
-; CHECK: %tmp.3 = ashr exact i32 %sext, 16
-; CHECK: ret i32 %tmp.3
+; CHECK-NEXT: [[SEXT:%.*]] = shl i32 %x, 16
+; CHECK-NEXT: [[TMP_3:%.*]] = ashr exact i32 [[SEXT]], 16
+; CHECK-NEXT: ret i32 [[TMP_3]]
+;
+ %tmp.1 = and i32 %x, 65535
+ %tmp.2 = xor i32 %tmp.1, -32768
+ %tmp.3 = add i32 %tmp.2, 32768
+ ret i32 %tmp.3
}
define i32 @test2(i32 %x) {
- %tmp.1 = and i32 %x, 65535 ; <i32> [#uses=1]
- %tmp.2 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
- %tmp.3 = add i32 %tmp.2, -32768 ; <i32> [#uses=1]
- ret i32 %tmp.3
; CHECK-LABEL: @test2(
-; CHECK: %sext = shl i32 %x, 16
-; CHECK: %tmp.3 = ashr exact i32 %sext, 16
-; CHECK: ret i32 %tmp.3
+; CHECK-NEXT: [[SEXT:%.*]] = shl i32 %x, 16
+; CHECK-NEXT: [[TMP_3:%.*]] = ashr exact i32 [[SEXT]], 16
+; CHECK-NEXT: ret i32 [[TMP_3]]
+;
+ %tmp.1 = and i32 %x, 65535
+ %tmp.2 = xor i32 %tmp.1, 32768
+ %tmp.3 = add i32 %tmp.2, -32768
+ ret i32 %tmp.3
}
define i32 @test3(i16 %P) {
- %tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
- %tmp.4 = xor i32 %tmp.1, 32768 ; <i32> [#uses=1]
- %tmp.5 = add i32 %tmp.4, -32768 ; <i32> [#uses=1]
- ret i32 %tmp.5
; CHECK-LABEL: @test3(
-; CHECK: %tmp.5 = sext i16 %P to i32
-; CHECK: ret i32 %tmp.5
+; CHECK-NEXT: [[TMP_5:%.*]] = sext i16 %P to i32
+; CHECK-NEXT: ret i32 [[TMP_5]]
+;
+ %tmp.1 = zext i16 %P to i32
+ %tmp.4 = xor i32 %tmp.1, 32768
+ %tmp.5 = add i32 %tmp.4, -32768
+ ret i32 %tmp.5
}
define i32 @test4(i32 %x) {
- %tmp.1 = and i32 %x, 255 ; <i32> [#uses=1]
- %tmp.2 = xor i32 %tmp.1, 128 ; <i32> [#uses=1]
- %tmp.3 = add i32 %tmp.2, -128 ; <i32> [#uses=1]
- ret i32 %tmp.3
; CHECK-LABEL: @test4(
-; CHECK: %sext = shl i32 %x, 24
-; CHECK: %tmp.3 = ashr exact i32 %sext, 24
-; CHECK: ret i32 %tmp.3
+; CHECK-NEXT: [[SEXT:%.*]] = shl i32 %x, 24
+; CHECK-NEXT: [[TMP_3:%.*]] = ashr exact i32 [[SEXT]], 24
+; CHECK-NEXT: ret i32 [[TMP_3]]
+;
+ %tmp.1 = and i32 %x, 255
+ %tmp.2 = xor i32 %tmp.1, 128
+ %tmp.3 = add i32 %tmp.2, -128
+ ret i32 %tmp.3
}
define i32 @test5(i32 %x) {
- %tmp.2 = shl i32 %x, 16 ; <i32> [#uses=1]
- %tmp.4 = ashr i32 %tmp.2, 16 ; <i32> [#uses=1]
- ret i32 %tmp.4
; CHECK-LABEL: @test5(
-; CHECK: %tmp.2 = shl i32 %x, 16
-; CHECK: %tmp.4 = ashr exact i32 %tmp.2, 16
-; CHECK: ret i32 %tmp.4
+; CHECK-NEXT: [[TMP_2:%.*]] = shl i32 %x, 16
+; CHECK-NEXT: [[TMP_4:%.*]] = ashr exact i32 [[TMP_2]], 16
+; CHECK-NEXT: ret i32 [[TMP_4]]
+;
+ %tmp.2 = shl i32 %x, 16
+ %tmp.4 = ashr i32 %tmp.2, 16
+ ret i32 %tmp.4
}
define i32 @test6(i16 %P) {
- %tmp.1 = zext i16 %P to i32 ; <i32> [#uses=1]
- %sext1 = shl i32 %tmp.1, 16 ; <i32> [#uses=1]
- %tmp.5 = ashr i32 %sext1, 16 ; <i32> [#uses=1]
- ret i32 %tmp.5
; CHECK-LABEL: @test6(
-; CHECK: %tmp.5 = sext i16 %P to i32
-; CHECK: ret i32 %tmp.5
+; CHECK-NEXT: [[TMP_5:%.*]] = sext i16 %P to i32
+; CHECK-NEXT: ret i32 [[TMP_5]]
+;
+ %tmp.1 = zext i16 %P to i32
+ %sext1 = shl i32 %tmp.1, 16
+ %tmp.5 = ashr i32 %sext1, 16
+ ret i32 %tmp.5
}
-define i32 @test7(i32 %x) nounwind readnone {
-entry:
- %shr = lshr i32 %x, 5 ; <i32> [#uses=1]
- %xor = xor i32 %shr, 67108864 ; <i32> [#uses=1]
- %sub = add i32 %xor, -67108864 ; <i32> [#uses=1]
- ret i32 %sub
+define i32 @test7(i32 %x) {
; CHECK-LABEL: @test7(
-; CHECK: %sub = ashr i32 %x, 5
-; CHECK: ret i32 %sub
+; CHECK-NEXT: [[SUB:%.*]] = ashr i32 %x, 5
+; CHECK-NEXT: ret i32 [[SUB]]
+;
+ %shr = lshr i32 %x, 5
+ %xor = xor i32 %shr, 67108864
+ %sub = add i32 %xor, -67108864
+ ret i32 %sub
}
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