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| author | David Bolvansky <david.bolvansky@gmail.com> | 2019-06-21 16:25:32 +0000 |
|---|---|---|
| committer | David Bolvansky <david.bolvansky@gmail.com> | 2019-06-21 16:25:32 +0000 |
| commit | dbcdad51ff8263240ab236404a2c23bb2d6c3b2e (patch) | |
| tree | c38c3a78c852d1566a4deecb83a0354b1f1aa428 /llvm/test/Transforms/InstCombine/shl-sub.ll | |
| parent | 96e77ce626a55dbf631a189a2e36e6d1404a9544 (diff) | |
| download | bcm5719-llvm-dbcdad51ff8263240ab236404a2c23bb2d6c3b2e.tar.gz bcm5719-llvm-dbcdad51ff8263240ab236404a2c23bb2d6c3b2e.zip | |
[InstCombine] (1 << (C - x)) -> ((1 << C) >> x) if C is bitwidth - 1
Summary:
```
%a = sub i32 31, %x
%r = shl i32 1, %a
=>
%d = shl i32 1, 31
%r = lshr i32 %d, %x
Done: 1
Optimization is correct!
```
https://rise4fun.com/Alive/btZm
Reviewers: spatel, lebedev.ri, nikic
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63652
llvm-svn: 364073
Diffstat (limited to 'llvm/test/Transforms/InstCombine/shl-sub.ll')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/shl-sub.ll | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/llvm/test/Transforms/InstCombine/shl-sub.ll b/llvm/test/Transforms/InstCombine/shl-sub.ll index 43ba548e92f..fc2939e6650 100644 --- a/llvm/test/Transforms/InstCombine/shl-sub.ll +++ b/llvm/test/Transforms/InstCombine/shl-sub.ll @@ -3,8 +3,7 @@ define i32 @shl_sub_i32(i32 %x) { ; CHECK-LABEL: @shl_sub_i32( -; CHECK-NEXT: [[S:%.*]] = sub i32 31, [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shl i32 1, [[S]] +; CHECK-NEXT: [[R:%.*]] = lshr i32 -2147483648, [[X:%.*]] ; CHECK-NEXT: ret i32 [[R]] ; %s = sub i32 31, %x @@ -16,7 +15,7 @@ define i32 @shl_sub_multiuse_i32(i32 %x) { ; CHECK-LABEL: @shl_sub_multiuse_i32( ; CHECK-NEXT: [[S:%.*]] = sub i32 31, [[X:%.*]] ; CHECK-NEXT: call void @use(i32 [[S]]) -; CHECK-NEXT: [[R:%.*]] = shl i32 1, [[S]] +; CHECK-NEXT: [[R:%.*]] = lshr i32 -2147483648, [[X]] ; CHECK-NEXT: ret i32 [[R]] ; %s = sub i32 31, %x @@ -27,8 +26,7 @@ define i32 @shl_sub_multiuse_i32(i32 %x) { define i8 @shl_sub_i8(i8 %x) { ; CHECK-LABEL: @shl_sub_i8( -; CHECK-NEXT: [[S:%.*]] = sub i8 7, [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shl i8 1, [[S]] +; CHECK-NEXT: [[R:%.*]] = lshr i8 -128, [[X:%.*]] ; CHECK-NEXT: ret i8 [[R]] ; %s = sub i8 7, %x @@ -38,8 +36,7 @@ define i8 @shl_sub_i8(i8 %x) { define i64 @shl_sub_i64(i64 %x) { ; CHECK-LABEL: @shl_sub_i64( -; CHECK-NEXT: [[S:%.*]] = sub i64 63, [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shl i64 1, [[S]] +; CHECK-NEXT: [[R:%.*]] = lshr i64 -9223372036854775808, [[X:%.*]] ; CHECK-NEXT: ret i64 [[R]] ; %s = sub i64 63, %x @@ -49,8 +46,7 @@ define i64 @shl_sub_i64(i64 %x) { define <2 x i64> @shl_sub_i64_vec(<2 x i64> %x) { ; CHECK-LABEL: @shl_sub_i64_vec( -; CHECK-NEXT: [[S:%.*]] = sub <2 x i64> <i64 63, i64 63>, [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shl <2 x i64> <i64 1, i64 1>, [[S]] +; CHECK-NEXT: [[R:%.*]] = lshr <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775808>, [[X:%.*]] ; CHECK-NEXT: ret <2 x i64> [[R]] ; %s = sub <2 x i64> <i64 63, i64 63>, %x |
