[InstCombine] move tests for select with bit-test of condition; NFC

These are all but 1 of the select-of-constant tests that appear 
to be transformed within foldSelectICmpAnd() and the block above 
it predicated by decomposeBitTestICmp().

As discussed in D45862 (and can be seen in several tests here),
we probably want to stop doing those transforms because they
can increase the instruction count without benefitting other
passes or codegen.

The 1 test not included here is a urem test where the bit hackery
allows us to remove a urem. To preserve killing that urem, we 
should do some stronger known-bits analysis or pattern matching of 
'urem x, (select-of-pow2-constants)'.

llvm-svn: 330768

1 files changed, 0 insertions, 200 deletions

diff --git a/llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll b/llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
index ac787bffa48..8acf49f0ef8 100644
--- a/llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
+++ b/llvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
@@ -637,104 +637,6 @@ define i32 @select_icmp_x_and_2147483648_ne_0_or_2147483648(i32 %x) {
   ret i32 %or.x
 }
 
-define i32 @test65(i64 %x) {
-; CHECK-LABEL: @test65(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i64 [[X:%.*]], 3
-; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = and i32 [[TMP2]], 2
-; CHECK-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP3]], 42
-; CHECK-NEXT:    ret i32 [[TMP4]]
-;
-  %1 = and i64 %x, 16
-  %2 = icmp ne i64 %1, 0
-  %3 = select i1 %2, i32 40, i32 42
-  ret i32 %3
-}
-
-define <2 x i32> @test65vec(<2 x i64> %x) {
-; CHECK-LABEL: @test65vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i64> [[X:%.*]], <i64 3, i64 3>
-; CHECK-NEXT:    [[TMP2:%.*]] = trunc <2 x i64> [[TMP1]] to <2 x i32>
-; CHECK-NEXT:    [[TMP3:%.*]] = and <2 x i32> [[TMP2]], <i32 2, i32 2>
-; CHECK-NEXT:    [[TMP4:%.*]] = xor <2 x i32> [[TMP3]], <i32 42, i32 42>
-; CHECK-NEXT:    ret <2 x i32> [[TMP4]]
-;
-  %1 = and <2 x i64> %x, <i64 16, i64 16>
-  %2 = icmp ne <2 x i64> %1, zeroinitializer
-  %3 = select <2 x i1> %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
-define i32 @test66(i64 %x) {
-; CHECK-LABEL: @test66(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i64 [[X:%.*]], 31
-; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
-; CHECK-NEXT:    [[TMP3:%.*]] = and i32 [[TMP2]], 2
-; CHECK-NEXT:    [[TMP4:%.*]] = xor i32 [[TMP3]], 42
-; CHECK-NEXT:    ret i32 [[TMP4]]
-;
-  %1 = and i64 %x, 4294967296
-  %2 = icmp ne i64 %1, 0
-  %3 = select i1 %2, i32 40, i32 42
-  ret i32 %3
-}
-
-define <2 x i32> @test66vec(<2 x i64> %x) {
-; CHECK-LABEL: @test66vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i64> [[X:%.*]], <i64 31, i64 31>
-; CHECK-NEXT:    [[TMP2:%.*]] = trunc <2 x i64> [[TMP1]] to <2 x i32>
-; CHECK-NEXT:    [[TMP3:%.*]] = and <2 x i32> [[TMP2]], <i32 2, i32 2>
-; CHECK-NEXT:    [[TMP4:%.*]] = xor <2 x i32> [[TMP3]], <i32 42, i32 42>
-; CHECK-NEXT:    ret <2 x i32> [[TMP4]]
-;
-  %1 = and <2 x i64> %x, <i64 4294967296, i64 4294967296>
-  %2 = icmp ne <2 x i64> %1, zeroinitializer
-  %3 = select <2 x i1> %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
-; Make sure we don't try to optimize a scalar 'and' with a vector select.
-define <2 x i32> @test66vec_scalar_and(i64 %x) {
-; CHECK-LABEL: @test66vec_scalar_and(
-; CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[X:%.*]], 4294967296
-; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 0
-; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], <2 x i32> <i32 42, i32 42>, <2 x i32> <i32 40, i32 40>
-; CHECK-NEXT:    ret <2 x i32> [[TMP3]]
-;
-  %1 = and i64 %x, 4294967296
-  %2 = icmp ne i64 %1, 0
-  %3 = select i1 %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
-define i32 @test67(i16 %x) {
-; CHECK-LABEL: @test67(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i16 [[X:%.*]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = and i16 [[TMP1]], 2
-; CHECK-NEXT:    [[TMP3:%.*]] = xor i16 [[TMP2]], 42
-; CHECK-NEXT:    [[TMP4:%.*]] = zext i16 [[TMP3]] to i32
-; CHECK-NEXT:    ret i32 [[TMP4]]
-;
-  %1 = and i16 %x, 4
-  %2 = icmp ne i16 %1, 0
-  %3 = select i1 %2, i32 40, i32 42
-  ret i32 %3
-}
-
-define <2 x i32> @test67vec(<2 x i16> %x) {
-; CHECK-LABEL: @test67vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i16> [[X:%.*]], <i16 1, i16 1>
-; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i16> [[TMP1]], <i16 2, i16 2>
-; CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i16> [[TMP2]], <i16 42, i16 42>
-; CHECK-NEXT:    [[TMP4:%.*]] = zext <2 x i16> [[TMP3]] to <2 x i32>
-; CHECK-NEXT:    ret <2 x i32> [[TMP4]]
-;
-  %1 = and <2 x i16> %x, <i16 4, i16 4>
-  %2 = icmp ne <2 x i16> %1, zeroinitializer
-  %3 = select <2 x i1> %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
 define i32 @test68(i32 %x, i32 %y) {
 ; CHECK-LABEL: @test68(
 ; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
@@ -866,108 +768,6 @@ define i8 @test70(i8 %x, i8 %y) {
   ret i8 %select
 }
 
-define i32 @test71(i32 %x) {
-; CHECK-LABEL: @test71(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
-; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 2
-; CHECK-NEXT:    [[TMP3:%.*]] = xor i32 [[TMP2]], 42
-; CHECK-NEXT:    ret i32 [[TMP3]]
-;
-  %1 = and i32 %x, 128
-  %2 = icmp ne i32 %1, 0
-  %3 = select i1 %2, i32 40, i32 42
-  ret i32 %3
-}
-
-define <2 x i32> @test71vec(<2 x i32> %x) {
-; CHECK-LABEL: @test71vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6>
-; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2>
-; CHECK-NEXT:    [[TMP3:%.*]] = xor <2 x i32> [[TMP2]], <i32 42, i32 42>
-; CHECK-NEXT:    ret <2 x i32> [[TMP3]]
-;
-  %1 = and <2 x i32> %x, <i32 128, i32 128>
-  %2 = icmp ne <2 x i32> %1, <i32 0, i32 0>
-  %3 = select <2 x i1> %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
-define i32 @test72(i32 %x) {
-; CHECK-LABEL: @test72(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
-; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 2
-; CHECK-NEXT:    [[TMP3:%.*]] = or i32 [[TMP2]], 40
-; CHECK-NEXT:    ret i32 [[TMP3]]
-;
-  %1 = and i32 %x, 128
-  %2 = icmp eq i32 %1, 0
-  %3 = select i1 %2, i32 40, i32 42
-  ret i32 %3
-}
-
-define <2 x i32> @test72vec(<2 x i32> %x) {
-; CHECK-LABEL: @test72vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6>
-; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2>
-; CHECK-NEXT:    [[TMP3:%.*]] = or <2 x i32> [[TMP2]], <i32 40, i32 40>
-; CHECK-NEXT:    ret <2 x i32> [[TMP3]]
-;
-  %1 = and <2 x i32> %x, <i32 128, i32 128>
-  %2 = icmp eq <2 x i32> %1, <i32 0, i32 0>
-  %3 = select <2 x i1> %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
-define i32 @test73(i32 %x) {
-; CHECK-LABEL: @test73(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
-; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 2
-; CHECK-NEXT:    [[TMP3:%.*]] = or i32 [[TMP2]], 40
-; CHECK-NEXT:    ret i32 [[TMP3]]
-;
-  %1 = trunc i32 %x to i8
-  %2 = icmp sgt i8 %1, -1
-  %3 = select i1 %2, i32 40, i32 42
-  ret i32 %3
-}
-
-define <2 x i32> @test73vec(<2 x i32> %x) {
-; CHECK-LABEL: @test73vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 6, i32 6>
-; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2>
-; CHECK-NEXT:    [[TMP3:%.*]] = or <2 x i32> [[TMP2]], <i32 40, i32 40>
-; CHECK-NEXT:    ret <2 x i32> [[TMP3]]
-;
-  %1 = trunc <2 x i32> %x to <2 x i8>
-  %2 = icmp sgt <2 x i8> %1, <i8 -1, i8 -1>
-  %3 = select <2 x i1> %2, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %3
-}
-
-define i32 @test74(i32 %x) {
-; CHECK-LABEL: @test74(
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 31
-; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 2
-; CHECK-NEXT:    [[TMP3:%.*]] = or i32 [[TMP2]], 40
-; CHECK-NEXT:    ret i32 [[TMP3]]
-;
-  %1 = icmp sgt i32 %x, -1
-  %2 = select i1 %1, i32 40, i32 42
-  ret i32 %2
-}
-
-define <2 x i32> @test74vec(<2 x i32> %x) {
-; CHECK-LABEL: @test74vec(
-; CHECK-NEXT:    [[TMP1:%.*]] = ashr <2 x i32> [[X:%.*]], <i32 31, i32 31>
-; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 2, i32 2>
-; CHECK-NEXT:    [[TMP3:%.*]] = or <2 x i32> [[TMP2]], <i32 40, i32 40>
-; CHECK-NEXT:    ret <2 x i32> [[TMP3]]
-;
-  %1 = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
-  %2 = select <2 x i1> %1, <2 x i32> <i32 40, i32 40>, <2 x i32> <i32 42, i32 42>
-  ret <2 x i32> %2
-}
-
 define i32 @shift_no_xor_multiuse_or(i32 %x, i32 %y) {
 ; CHECK-LABEL: @shift_no_xor_multiuse_or(
 ; CHECK-NEXT:    [[OR:%.*]] = or i32 [[Y:%.*]], 2