diff options
author | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-08-05 08:22:29 +0000 |
---|---|---|
committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-08-05 08:22:29 +0000 |
commit | 870bf1788ca95986dacf4a1b56bbc2cf7127c230 (patch) | |
tree | 8718955a31f170b1a2bcb487251e72db633be5bf /llvm/test/Transforms/InstCombine/select-bitext.ll | |
parent | 470608e3e48af598513f36107e36a555a1966e75 (diff) | |
download | bcm5719-llvm-870bf1788ca95986dacf4a1b56bbc2cf7127c230.tar.gz bcm5719-llvm-870bf1788ca95986dacf4a1b56bbc2cf7127c230.zip |
[InstCombine] try to fold (select C, (sext A), B) into logical ops
Summary:
Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and
B is a compatible constant, also for zext instead of sext. This will then be
further folded into logical operations.
The transformation would be valid for non-i1 types as well, but other parts of
InstCombine prefer to have sext from non-i1 as an operand of select.
Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32
for boolean operations. With this change, the boolean logic is fully
recovered.
Reviewers: majnemer, spatel, tstellarAMD
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22747
llvm-svn: 277801
Diffstat (limited to 'llvm/test/Transforms/InstCombine/select-bitext.ll')
-rw-r--r-- | llvm/test/Transforms/InstCombine/select-bitext.ll | 74 |
1 files changed, 50 insertions, 24 deletions
diff --git a/llvm/test/Transforms/InstCombine/select-bitext.ll b/llvm/test/Transforms/InstCombine/select-bitext.ll index 49069cce854..fc379d28a73 100644 --- a/llvm/test/Transforms/InstCombine/select-bitext.ll +++ b/llvm/test/Transforms/InstCombine/select-bitext.ll @@ -3,8 +3,8 @@ define i32 @test_sext1(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_sext1( -; CHECK-NEXT: [[CCAX:%.*]] = sext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 0 +; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 %ccb, %cca +; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = sext i1 %cca to i32 @@ -14,8 +14,8 @@ define i32 @test_sext1(i1 %cca, i1 %ccb) { define i32 @test_sext2(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_sext2( -; CHECK-NEXT: [[CCAX:%.*]] = sext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 -1, i32 [[CCAX]] +; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 %ccb, %cca +; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = sext i1 %cca to i32 @@ -25,8 +25,9 @@ define i32 @test_sext2(i1 %cca, i1 %ccb) { define i32 @test_sext3(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_sext3( -; CHECK-NEXT: [[CCAX:%.*]] = sext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 0, i32 [[CCAX]] +; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true +; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 [[NOT_CCB]], %cca +; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = sext i1 %cca to i32 @@ -36,8 +37,9 @@ define i32 @test_sext3(i1 %cca, i1 %ccb) { define i32 @test_sext4(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_sext4( -; CHECK-NEXT: [[CCAX:%.*]] = sext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 -1 +; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true +; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 [[NOT_CCB]], %cca +; CHECK-NEXT: [[R:%.*]] = sext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = sext i1 %cca to i32 @@ -47,8 +49,8 @@ define i32 @test_sext4(i1 %cca, i1 %ccb) { define i32 @test_zext1(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_zext1( -; CHECK-NEXT: [[CCAX:%.*]] = zext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 0 +; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 %ccb, %cca +; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = zext i1 %cca to i32 @@ -58,8 +60,8 @@ define i32 @test_zext1(i1 %cca, i1 %ccb) { define i32 @test_zext2(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_zext2( -; CHECK-NEXT: [[CCAX:%.*]] = zext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 1, i32 [[CCAX]] +; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 %ccb, %cca +; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = zext i1 %cca to i32 @@ -69,8 +71,9 @@ define i32 @test_zext2(i1 %cca, i1 %ccb) { define i32 @test_zext3(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_zext3( -; CHECK-NEXT: [[CCAX:%.*]] = zext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 0, i32 [[CCAX]] +; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true +; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 [[NOT_CCB]], %cca +; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = zext i1 %cca to i32 @@ -80,8 +83,9 @@ define i32 @test_zext3(i1 %cca, i1 %ccb) { define i32 @test_zext4(i1 %cca, i1 %ccb) { ; CHECK-LABEL: @test_zext4( -; CHECK-NEXT: [[CCAX:%.*]] = zext i1 %cca to i32 -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, i32 [[CCAX]], i32 1 +; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 %ccb, true +; CHECK-NEXT: [[FOLD_R:%.*]] = or i1 [[NOT_CCB]], %cca +; CHECK-NEXT: [[R:%.*]] = zext i1 [[FOLD_R]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %ccax = zext i1 %cca to i32 @@ -151,10 +155,10 @@ define i32 @test_op_op(i32 %a, i32 %b, i32 %c) { ret i32 %r } -define <2 x i32> @test_vectors1(<2 x i1> %cca, <2 x i1> %ccb) { -; CHECK-LABEL: @test_vectors1( -; CHECK-NEXT: [[CCAX:%.*]] = sext <2 x i1> %cca to <2 x i32> -; CHECK-NEXT: [[R:%.*]] = select <2 x i1> %ccb, <2 x i32> [[CCAX]], <2 x i32> zeroinitializer +define <2 x i32> @test_vectors_sext(<2 x i1> %cca, <2 x i1> %ccb) { +; CHECK-LABEL: @test_vectors_sext( +; CHECK-NEXT: [[FOLD_R:%.*]] = and <2 x i1> %ccb, %cca +; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[FOLD_R]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[R]] ; %ccax = sext <2 x i1> %cca to <2 x i32> @@ -162,13 +166,35 @@ define <2 x i32> @test_vectors1(<2 x i1> %cca, <2 x i1> %ccb) { ret <2 x i32> %r } -define <2 x i32> @test_vectors2(<2 x i1> %cca, i1 %ccb) { -; CHECK-LABEL: @test_vectors2( -; CHECK-NEXT: [[CCAX:%.*]] = sext <2 x i1> %cca to <2 x i32> -; CHECK-NEXT: [[R:%.*]] = select i1 %ccb, <2 x i32> [[CCAX]], <2 x i32> zeroinitializer +define <2 x i32> @test_vectors_zext(<2 x i1> %cca, <2 x i1> %ccb) { +; CHECK-LABEL: @test_vectors_zext( +; CHECK-NEXT: [[FOLD_R:%.*]] = and <2 x i1> %ccb, %cca +; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[FOLD_R]] to <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[R]] +; + %ccax = zext <2 x i1> %cca to <2 x i32> + %r = select <2 x i1> %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0> + ret <2 x i32> %r +} + +define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) { +; CHECK-LABEL: @scalar_select_of_vectors_sext( +; CHECK-NEXT: [[FOLD_R:%.*]] = select i1 %ccb, <2 x i1> %cca, <2 x i1> zeroinitializer +; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[FOLD_R]] to <2 x i32> ; CHECK-NEXT: ret <2 x i32> [[R]] ; %ccax = sext <2 x i1> %cca to <2 x i32> %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0> ret <2 x i32> %r } + +define <2 x i32> @scalar_select_of_vectors_zext(<2 x i1> %cca, i1 %ccb) { +; CHECK-LABEL: @scalar_select_of_vectors_zext( +; CHECK-NEXT: [[FOLD_R:%.*]] = select i1 %ccb, <2 x i1> %cca, <2 x i1> zeroinitializer +; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[FOLD_R]] to <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[R]] +; + %ccax = zext <2 x i1> %cca to <2 x i32> + %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0> + ret <2 x i32> %r +} |