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| author | Craig Topper <craig.topper@intel.com> | 2019-12-03 13:48:39 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-12-03 14:02:22 -0800 |
| commit | 5ebbabc1af360756f402203ba7704bb480f279a7 (patch) | |
| tree | e66a0cd49cc410305e9ce9807c136e6d22ad4e12 /llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll | |
| parent | 15a172bebbc5b95d05733ef842fcdbd14e9d441d (diff) | |
| download | bcm5719-llvm-5ebbabc1af360756f402203ba7704bb480f279a7.tar.gz bcm5719-llvm-5ebbabc1af360756f402203ba7704bb480f279a7.zip | |
[InstCombine] Revert aafde063aaf09285c701c80cd4b543c2beb523e8 and 6749dc3446671df05235d0a218c426a314ac33cd related to bitcast handling of x86_mmx
This reverts these two commits
[InstCombine] Turn (extractelement <1 x i64/double> (bitcast (x86_mmx))) into a single bitcast from x86_mmx to i64/double.
[InstCombine] Don't transform bitcasts between x86_mmx and v1i64 into insertelement/extractelement
We're seeing at least one internal test failure related to a
bitcast that was previously before an inline assembly block
containing emms being placed after it. This leads to the mmx
state ending up not empty after the emms. IR has no way to
make any specific guarantees about this. Reverting these patches
to get back to previous behavior which at least worked for this
test.
Diffstat (limited to 'llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll b/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll index 21c8e78bbb1..50cbd763987 100644 --- a/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll +++ b/llvm/test/Transforms/InstCombine/bitcast-vec-canon.ll @@ -40,7 +40,8 @@ define <1 x i64> @d(i64 %y) { define x86_mmx @e(<1 x i64> %y) { ; CHECK-LABEL: @e( -; CHECK-NEXT: [[C:%.*]] = bitcast <1 x i64> %y to x86_mmx +; CHECK-NEXT: [[TMP1:%.*]] = extractelement <1 x i64> %y, i32 0 +; CHECK-NEXT: [[C:%.*]] = bitcast i64 [[TMP1]] to x86_mmx ; CHECK-NEXT: ret x86_mmx [[C]] ; %c = bitcast <1 x i64> %y to x86_mmx @@ -49,7 +50,8 @@ define x86_mmx @e(<1 x i64> %y) { define <1 x i64> @f(x86_mmx %y) { ; CHECK-LABEL: @f( -; CHECK-NEXT: [[C:%.*]] = bitcast x86_mmx [[Y:%.*]] to <1 x i64> +; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx %y to i64 +; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0 ; CHECK-NEXT: ret <1 x i64> [[C]] ; %c = bitcast x86_mmx %y to <1 x i64> @@ -59,7 +61,7 @@ define <1 x i64> @f(x86_mmx %y) { define double @g(x86_mmx %x) { ; CHECK-LABEL: @g( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = bitcast x86_mmx [[X:%.*]] to double +; CHECK-NEXT: [[TMP0:%.*]] = bitcast x86_mmx %x to double ; CHECK-NEXT: ret double [[TMP0]] ; entry: |
