summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/InstCombine/and.ll
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@gmail.com>2017-04-04 19:31:21 +0000
committerCraig Topper <craig.topper@gmail.com>2017-04-04 19:31:21 +0000
commit11791a723b6d85c2d76ae8c1e00fc04a81488c0f (patch)
tree3ad3a82a32429f4dbaddab82e994bcef8d33a481 /llvm/test/Transforms/InstCombine/and.ll
parentb76fb84032fb25f26041101ec78096bd82a518a0 (diff)
downloadbcm5719-llvm-11791a723b6d85c2d76ae8c1e00fc04a81488c0f.tar.gz
bcm5719-llvm-11791a723b6d85c2d76ae8c1e00fc04a81488c0f.zip
[InstCombine] Add test cases for missing combines of phis with and/or/xor with constant argument. NFC
llvm-svn: 299460
Diffstat (limited to 'llvm/test/Transforms/InstCombine/and.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/and.ll68
1 files changed, 68 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index 9a23342feb1..34285a2a657 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -525,3 +525,71 @@ define <2 x i32> @test40vec2(i1 %C) {
%V = and <2 x i32> %A, <i32 123, i32 333>
ret <2 x i32> %V
}
+
+define i32 @test41(i1 %which) {
+; CHECK-LABEL: @test41(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
+; CHECK: delay:
+; CHECK-NEXT: br label [[FINAL]]
+; CHECK: final:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ 104, [[ENTRY:%.*]] ], [ 10, [[DELAY]] ]
+; CHECK-NEXT: ret i32 [[A]]
+;
+entry:
+ br i1 %which, label %final, label %delay
+
+delay:
+ br label %final
+
+final:
+ %A = phi i32 [ 1000, %entry ], [ 10, %delay ]
+ %value = and i32 %A, 123
+ ret i32 %value
+}
+
+define <2 x i32> @test41vec(i1 %which) {
+; CHECK-LABEL: @test41vec(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
+; CHECK: delay:
+; CHECK-NEXT: br label [[FINAL]]
+; CHECK: final:
+; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 1000>, [[ENTRY:%.*]] ], [ <i32 10, i32 10>, [[DELAY]] ]
+; CHECK-NEXT: [[VALUE:%.*]] = and <2 x i32> [[A]], <i32 106, i32 106>
+; CHECK-NEXT: ret <2 x i32> [[VALUE]]
+;
+entry:
+ br i1 %which, label %final, label %delay
+
+delay:
+ br label %final
+
+final:
+ %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
+ %value = and <2 x i32> %A, <i32 123, i32 123>
+ ret <2 x i32> %value
+}
+
+define <2 x i32> @test41vec2(i1 %which) {
+; CHECK-LABEL: @test41vec2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
+; CHECK: delay:
+; CHECK-NEXT: br label [[FINAL]]
+; CHECK: final:
+; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 2500>, [[ENTRY:%.*]] ], [ <i32 10, i32 30>, [[DELAY]] ]
+; CHECK-NEXT: [[VALUE:%.*]] = and <2 x i32> [[A]], <i32 123, i32 333>
+; CHECK-NEXT: ret <2 x i32> [[VALUE]]
+;
+entry:
+ br i1 %which, label %final, label %delay
+
+delay:
+ br label %final
+
+final:
+ %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
+ %value = and <2 x i32> %A, <i32 123, i32 333>
+ ret <2 x i32> %value
+}
OpenPOWER on IntegriCloud