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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-04-24 18:35:59 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-04-24 18:35:59 +0000 |
| commit | 4b5462f1194ee3d6bf7862d0ad70159b5a27eced (patch) | |
| tree | 83ee5f5c884ba21134203b7ed9f4f3d14e476b1d /llvm/test/Transforms/InstCombine/2011-05-02-VectorBoolean.ll | |
| parent | bfccefd5142626be523fd1a668566512553b0b59 (diff) | |
| download | bcm5719-llvm-4b5462f1194ee3d6bf7862d0ad70159b5a27eced.tar.gz bcm5719-llvm-4b5462f1194ee3d6bf7862d0ad70159b5a27eced.zip | |
[InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is required
As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns.
llvm-svn: 267359
Diffstat (limited to 'llvm/test/Transforms/InstCombine/2011-05-02-VectorBoolean.ll')
0 files changed, 0 insertions, 0 deletions
