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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-04-03 01:58:57 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-04-03 01:58:57 +0000 |
| commit | f426ddbfc7d815107faea6751719fe41877ce943 (patch) | |
| tree | 2f28a7f935fa9e330f712596b9e76ffba7d26d8c /llvm/test/Transforms/Inline | |
| parent | f7887d41cbd73cad2e92eea60c710e4f263cdf18 (diff) | |
| download | bcm5719-llvm-f426ddbfc7d815107faea6751719fe41877ce943.tar.gz bcm5719-llvm-f426ddbfc7d815107faea6751719fe41877ce943.zip | |
AMDGPU: Assume ECC is enabled by default if supported
The test should really be checking for the property directly in the
code object headers, but there are problems with this. I don't see
this directly represented in the text form, and for the binary
emission this is depending on a function level subtarget feature to
emit a global flag.
llvm-svn: 357558
Diffstat (limited to 'llvm/test/Transforms/Inline')
| -rw-r--r-- | llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-sram-ecc.ll | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-sram-ecc.ll b/llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-sram-ecc.ll new file mode 100644 index 00000000000..d7aa65d753c --- /dev/null +++ b/llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-sram-ecc.ll @@ -0,0 +1,70 @@ +; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -inline < %s | FileCheck %s +; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s + +; sram-ecc can be safely ignored when inlining, since no intrinisics +; or other directly exposed operations depend on it. + +define i32 @func_default() #0 { + ret i32 0 +} + +define i32 @func_ecc_enabled() #1 { + ret i32 0 +} + +define i32 @func_ecc_disabled() #2 { + ret i32 0 +} + +; CHECK-LABEL: @default_call_default( +; CHECK-NEXT: ret i32 0 +define i32 @default_call_default() #0 { + %call = call i32 @func_default() + ret i32 %call +} + +; CHECK-LABEL: @ecc_enabled_call_default( +; CHECK-NEXT: ret i32 0 +define i32 @ecc_enabled_call_default() #1 { + %call = call i32 @func_default() + ret i32 %call +} + +; CHECK-LABEL: @ecc_enabled_call_ecc_enabled( +; CHECK-NEXT: ret i32 0 +define i32 @ecc_enabled_call_ecc_enabled() #1 { + %call = call i32 @func_ecc_enabled() + ret i32 %call +} + +; CHECK-LABEL: @ecc_enabled_call_ecc_disabled( +; CHECK-NEXT: ret i32 0 +define i32 @ecc_enabled_call_ecc_disabled() #1 { + %call = call i32 @func_ecc_disabled() + ret i32 %call +} + +; CHECK-LABEL: @ecc_disabled_call_default( +; CHECK-NEXT: ret i32 0 +define i32 @ecc_disabled_call_default() #2 { + %call = call i32 @func_default() + ret i32 %call +} + +; CHECK-LABEL: @ecc_disabled_call_ecc_enabled( +; CHECK-NEXT: ret i32 0 +define i32 @ecc_disabled_call_ecc_enabled() #2 { + %call = call i32 @func_ecc_enabled() + ret i32 %call +} + +; CHECK-LABEL: @ecc_disabled_call_ecc_disabled( +; CHECK-NEXT: ret i32 0 +define i32 @ecc_disabled_call_ecc_disabled() #2 { + %call = call i32 @func_ecc_disabled() + ret i32 %call +} + +attributes #0 = { nounwind } +attributes #1 = { nounwind "target-features"="+sram-ecc" } +attributes #2 = { nounwind "target-features"="-sram-ecc" } |
