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| author | Serguei Katkov <serguei.katkov@azul.com> | 2018-01-22 07:31:41 +0000 |
|---|---|---|
| committer | Serguei Katkov <serguei.katkov@azul.com> | 2018-01-22 07:31:41 +0000 |
| commit | 50714a1cbc9b0f49e0dff961ffb50fd80668b250 (patch) | |
| tree | a0b9e0ffffbefc26daf54a949b8b1e0b6f956dd6 /llvm/test/Transforms/IndVarSimplify/inner-loop.ll | |
| parent | bb3c570633d67e3a0c80992b09f9743fb2e2ea78 (diff) | |
| download | bcm5719-llvm-50714a1cbc9b0f49e0dff961ffb50fd80668b250.tar.gz bcm5719-llvm-50714a1cbc9b0f49e0dff961ffb50fd80668b250.zip | |
[SCEV] Fix isLoopEntryGuardedByCond usage
ScalarEvolution::isKnownPredicate invokes isLoopEntryGuardedByCond without check
that SCEV is available at entry point of the loop. It is incorrect and fixed by patch.
Reviewers: sanjoy, mkazantsev, anna, dorit
Reviewed By: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42165
llvm-svn: 323077
Diffstat (limited to 'llvm/test/Transforms/IndVarSimplify/inner-loop.ll')
| -rw-r--r-- | llvm/test/Transforms/IndVarSimplify/inner-loop.ll | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/llvm/test/Transforms/IndVarSimplify/inner-loop.ll b/llvm/test/Transforms/IndVarSimplify/inner-loop.ll new file mode 100644 index 00000000000..328987cba8b --- /dev/null +++ b/llvm/test/Transforms/IndVarSimplify/inner-loop.ll @@ -0,0 +1,54 @@ +; RUN: opt < %s -indvars -S | FileCheck %s + +; This is regression test for the bug in ScalarEvolution::isKnownPredicate. +; It does not check whether SCEV is available at loop entry before invoking +; and utility function isLoopEntryGuardedByCond and that leads to miscompile. + +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1" +target triple = "x86_64-unknown-linux-gnu" + +declare void @foo(i64) +declare void @bar(i32) + +define void @test(i8* %arr) { +entry: + br label %outer_header + +outer_header: + %i = phi i32 [40, %entry], [%i.next, %outer_latch] + %i.64 = sext i32 %i to i64 + br label %inner_header + +inner_header: + %j = phi i32 [27, %outer_header], [%j.next, %inner_backedge] + %j1 = zext i32 %j to i64 +; The next 4 lines are required for avoid widening of %j and +; SCEV at %cmp would not be AddRec. + %gep = getelementptr inbounds i8, i8* %arr, i64 %j1 + %ld = load i8, i8* %gep + %ec = icmp eq i8 %ld, 0 + br i1 %ec, label %return, label %inner_backedge + +inner_backedge: + %cmp = icmp ult i32 %j, %i + %s = select i1 %cmp, i32 %i, i32 %j +; Select should not be simplified because if +; %i == 26 and %j == 27, %s should be equal to %j. +; In case of a bug the instruction is simplified to +; %s = select i1 true, i32 %0, i32 %j +; CHECK-NOT: %s = select i1 true + call void @bar(i32 %s) + %j.next = add nsw i32 %j, -2 + %cond = icmp ult i32 %j, 3 + br i1 %cond, label %outer_latch, label %inner_header + +outer_latch: + %i.next = add i32 %i, -1 + %cond2 = icmp sgt i32 %i.next, 13 +; This line is just for forcing widening of %i + call void @foo(i64 %i.64) + br i1 %cond2, label %outer_header, label %return + +return: + ret void +} |

