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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-25 20:16:11 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-25 20:16:11 +0000 |
| commit | f97ace5639863bde1eb4cc9081d191896657b56b (patch) | |
| tree | 650289c852732ff29ddd2c1de2dcfbf28ac2650c /llvm/test/Transforms/EarlyCSE | |
| parent | 84b3288853aaf54295c7493a439473407262ec16 (diff) | |
| download | bcm5719-llvm-f97ace5639863bde1eb4cc9081d191896657b56b.tar.gz bcm5719-llvm-f97ace5639863bde1eb4cc9081d191896657b56b.zip | |
AMDGPU: Remove IntrReadMem from memtime/memrealtime intrinsics
EarlyCSE with MemorySSA was able to use this to merge multiple calls
with no intervening store.
llvm-svn: 354814
Diffstat (limited to 'llvm/test/Transforms/EarlyCSE')
| -rw-r--r-- | llvm/test/Transforms/EarlyCSE/AMDGPU/lit.local.cfg | 5 | ||||
| -rw-r--r-- | llvm/test/Transforms/EarlyCSE/AMDGPU/memrealtime.ll | 43 |
2 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/Transforms/EarlyCSE/AMDGPU/lit.local.cfg b/llvm/test/Transforms/EarlyCSE/AMDGPU/lit.local.cfg new file mode 100644 index 00000000000..4536d089640 --- /dev/null +++ b/llvm/test/Transforms/EarlyCSE/AMDGPU/lit.local.cfg @@ -0,0 +1,5 @@ +config.suffixes = ['.ll'] + +targets = set(config.root.targets_to_build.split()) +if not 'AMDGPU' in targets: + config.unsupported = True diff --git a/llvm/test/Transforms/EarlyCSE/AMDGPU/memrealtime.ll b/llvm/test/Transforms/EarlyCSE/AMDGPU/memrealtime.ll new file mode 100644 index 00000000000..6b42ee8d71e --- /dev/null +++ b/llvm/test/Transforms/EarlyCSE/AMDGPU/memrealtime.ll @@ -0,0 +1,43 @@ +; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -early-cse-memssa < %s | FileCheck %s +target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5" + +; CHECK-LABEL: @memrealtime( +; CHECK: call i64 @llvm.amdgcn.s.memrealtime() +; CHECK: call i64 @llvm.amdgcn.s.memrealtime() +define amdgpu_kernel void @memrealtime(i64 %cycles) #0 { +entry: + %0 = tail call i64 @llvm.amdgcn.s.memrealtime() + %cmp3 = icmp sgt i64 %cycles, 0 + br i1 %cmp3, label %while.body, label %while.end + +while.body: + %1 = tail call i64 @llvm.amdgcn.s.memrealtime() + %sub = sub nsw i64 %1, %0 + %cmp = icmp slt i64 %sub, %cycles + br i1 %cmp, label %while.body, label %while.end + +while.end: + ret void +} + +; CHECK-LABEL: @memtime( +; CHECK: call i64 @llvm.amdgcn.s.memtime() +; CHECK: call i64 @llvm.amdgcn.s.memtime() +define amdgpu_kernel void @memtime(i64 %cycles) #0 { +entry: + %0 = tail call i64 @llvm.amdgcn.s.memtime() + %cmp3 = icmp sgt i64 %cycles, 0 + br i1 %cmp3, label %while.body, label %while.end + +while.body: + %1 = tail call i64 @llvm.amdgcn.s.memtime() + %sub = sub nsw i64 %1, %0 + %cmp = icmp slt i64 %sub, %cycles + br i1 %cmp, label %while.body, label %while.end + +while.end: + ret void +} + +declare i64 @llvm.amdgcn.s.memrealtime() +declare i64 @llvm.amdgcn.s.memtime() |
