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author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
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committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/Transforms/ConstantHoisting | |
parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/Transforms/ConstantHoisting')
5 files changed, 17 insertions, 17 deletions
diff --git a/llvm/test/Transforms/ConstantHoisting/AArch64/const-addr.ll b/llvm/test/Transforms/ConstantHoisting/AArch64/const-addr.ll index a317e5ccaf7..4c36d20dc6b 100644 --- a/llvm/test/Transforms/ConstantHoisting/AArch64/const-addr.ll +++ b/llvm/test/Transforms/ConstantHoisting/AArch64/const-addr.ll @@ -11,12 +11,12 @@ define i32 @test1() nounwind { ; CHECK: %o3 = getelementptr %T, %T* %1, i32 0, i32 3 %at = inttoptr i64 68141056 to %T* %o1 = getelementptr %T, %T* %at, i32 0, i32 1 - %t1 = load i32* %o1 + %t1 = load i32, i32* %o1 %o2 = getelementptr %T, %T* %at, i32 0, i32 2 - %t2 = load i32* %o2 + %t2 = load i32, i32* %o2 %a1 = add i32 %t1, %t2 %o3 = getelementptr %T, %T* %at, i32 0, i32 3 - %t3 = load i32* %o3 + %t3 = load i32, i32* %o3 %a2 = add i32 %a1, %t3 ret i32 %a2 } diff --git a/llvm/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll b/llvm/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll index 82ee04bf466..69b13cf9c9a 100644 --- a/llvm/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll +++ b/llvm/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll @@ -11,11 +11,11 @@ define i32 @test1() nounwind { ; CHECK: %1 = inttoptr i32 %const to %T* ; CHECK: %addr1 = getelementptr %T, %T* %1, i32 0, i32 1 %addr1 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 1 - %tmp1 = load i32* %addr1 + %tmp1 = load i32, i32* %addr1 %addr2 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 2 - %tmp2 = load i32* %addr2 + %tmp2 = load i32, i32* %addr2 %addr3 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 3 - %tmp3 = load i32* %addr3 + %tmp3 = load i32, i32* %addr3 %tmp4 = add i32 %tmp1, %tmp2 %tmp5 = add i32 %tmp3, %tmp4 ret i32 %tmp5 diff --git a/llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll b/llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll index d5531820113..4cc504f11bd 100644 --- a/llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll +++ b/llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll @@ -19,7 +19,7 @@ if.then152: if.end167: ; CHECK: and i32 {{.*}}, 32768 %shl161 = shl nuw nsw i32 %conv121, 15 - %0 = load i8* undef, align 1 + %0 = load i8, i8* undef, align 1 %conv169 = zext i8 %0 to i32 %shl170 = shl nuw nsw i32 %conv169, 7 %shl161.masked = and i32 %shl161, 32768 @@ -49,7 +49,7 @@ if.then152: if.end167: ; CHECK: add i32 {{.*}}, -32758 %shl161 = shl nuw nsw i32 %conv121, 15 - %0 = load i8* undef, align 1 + %0 = load i8, i8* undef, align 1 %conv169 = zext i8 %0 to i32 %shl170 = shl nuw nsw i32 %conv169, 7 %shl161.masked = and i32 %shl161, 32773 diff --git a/llvm/test/Transforms/ConstantHoisting/X86/cast-inst.ll b/llvm/test/Transforms/ConstantHoisting/X86/cast-inst.ll index f490f4a3723..bd1e196b644 100644 --- a/llvm/test/Transforms/ConstantHoisting/X86/cast-inst.ll +++ b/llvm/test/Transforms/ConstantHoisting/X86/cast-inst.ll @@ -9,19 +9,19 @@ define i32 @cast_inst_test() { ; CHECK-LABEL: @cast_inst_test ; CHECK: %const = bitcast i64 4646526064 to i64 ; CHECK: %1 = inttoptr i64 %const to i32* -; CHECK: %v0 = load i32* %1, align 16 +; CHECK: %v0 = load i32, i32* %1, align 16 ; CHECK: %const_mat = add i64 %const, 16 ; CHECK-NEXT: %2 = inttoptr i64 %const_mat to i32* -; CHECK-NEXT: %v1 = load i32* %2, align 16 +; CHECK-NEXT: %v1 = load i32, i32* %2, align 16 ; CHECK: %const_mat1 = add i64 %const, 32 ; CHECK-NEXT: %3 = inttoptr i64 %const_mat1 to i32* -; CHECK-NEXT: %v2 = load i32* %3, align 16 +; CHECK-NEXT: %v2 = load i32, i32* %3, align 16 %a0 = inttoptr i64 4646526064 to i32* - %v0 = load i32* %a0, align 16 + %v0 = load i32, i32* %a0, align 16 %a1 = inttoptr i64 4646526080 to i32* - %v1 = load i32* %a1, align 16 + %v1 = load i32, i32* %a1, align 16 %a2 = inttoptr i64 4646526096 to i32* - %v2 = load i32* %a2, align 16 + %v2 = load i32, i32* %a2, align 16 %r0 = add i32 %v0, %v1 %r1 = add i32 %r0, %v2 ret i32 %r1 diff --git a/llvm/test/Transforms/ConstantHoisting/X86/const-base-addr.ll b/llvm/test/Transforms/ConstantHoisting/X86/const-base-addr.ll index eabf80d182f..db5dfdd1538 100644 --- a/llvm/test/Transforms/ConstantHoisting/X86/const-base-addr.ll +++ b/llvm/test/Transforms/ConstantHoisting/X86/const-base-addr.ll @@ -12,11 +12,11 @@ define i32 @test1() nounwind { ; CHECK: %1 = inttoptr i32 %const to %T* ; CHECK: %addr1 = getelementptr %T, %T* %1, i32 0, i32 1 %addr1 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 1 - %tmp1 = load i32* %addr1 + %tmp1 = load i32, i32* %addr1 %addr2 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 2 - %tmp2 = load i32* %addr2 + %tmp2 = load i32, i32* %addr2 %addr3 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 3 - %tmp3 = load i32* %addr3 + %tmp3 = load i32, i32* %addr3 %tmp4 = add i32 %tmp1, %tmp2 %tmp5 = add i32 %tmp3, %tmp4 ret i32 %tmp5 |