diff options
| author | Sanjay Patel <spatel@rotateright.com> | 2019-02-24 15:31:27 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2019-02-24 15:31:27 +0000 |
| commit | cb04ba032f573fe75fce0e813ba11b0d47f1159e (patch) | |
| tree | 4719accf69c48c7cd3df700168b0d34f5329e80a /llvm/test/Transforms/CodeGenPrepare/X86 | |
| parent | 9b49f36a036a53d2cc600527a8b403cd48f7e411 (diff) | |
| download | bcm5719-llvm-cb04ba032f573fe75fce0e813ba11b0d47f1159e.tar.gz bcm5719-llvm-cb04ba032f573fe75fce0e813ba11b0d47f1159e.zip | |
[CGP] add special-cases to form unsigned add with overflow (PR40486)
There's likely a missed IR canonicalization for at least 1 of these
patterns. Otherwise, we wouldn't have needed the pattern-matching
enhancement in D57516.
Note that -- unlike usubo added with D57789 -- the TLI hook for
this transform defaults to 'on'. So if there's any perf fallout
from this, targets should look at how they're lowering the uaddo
node in SDAG and/or override that hook.
The x86 diffs suggest that there's some missing pattern-matching
for forming inc/dec.
This should fix the remaining known problems in:
https://bugs.llvm.org/show_bug.cgi?id=40486
https://bugs.llvm.org/show_bug.cgi?id=31754
llvm-svn: 354746
Diffstat (limited to 'llvm/test/Transforms/CodeGenPrepare/X86')
| -rw-r--r-- | llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll b/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll index 177aee7c2c0..0e7517132cf 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll @@ -162,10 +162,11 @@ define i1 @uaddo_i16_increment_noncanonical_3(i16 %x, i16* %p) { define i1 @uaddo_i64_increment_alt(i64 %x, i64* %p) { ; CHECK-LABEL: @uaddo_i64_increment_alt( -; CHECK-NEXT: [[A:%.*]] = add i64 [[X:%.*]], 1 -; CHECK-NEXT: store i64 [[A]], i64* [[P:%.*]] -; CHECK-NEXT: [[OV:%.*]] = icmp eq i64 [[X]], -1 -; CHECK-NEXT: ret i1 [[OV]] +; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 1) +; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0 +; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1 +; CHECK-NEXT: store i64 [[MATH]], i64* [[P:%.*]] +; CHECK-NEXT: ret i1 [[OV1]] ; %a = add i64 %x, 1 store i64 %a, i64* %p @@ -177,10 +178,11 @@ define i1 @uaddo_i64_increment_alt(i64 %x, i64* %p) { define i1 @uaddo_i64_increment_alt_dom(i64 %x, i64* %p) { ; CHECK-LABEL: @uaddo_i64_increment_alt_dom( -; CHECK-NEXT: [[OV:%.*]] = icmp eq i64 [[X:%.*]], -1 -; CHECK-NEXT: [[A:%.*]] = add i64 [[X]], 1 -; CHECK-NEXT: store i64 [[A]], i64* [[P:%.*]] -; CHECK-NEXT: ret i1 [[OV]] +; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 1) +; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0 +; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1 +; CHECK-NEXT: store i64 [[MATH]], i64* [[P:%.*]] +; CHECK-NEXT: ret i1 [[OV1]] ; %ov = icmp eq i64 %x, -1 %a = add i64 %x, 1 @@ -192,10 +194,11 @@ define i1 @uaddo_i64_increment_alt_dom(i64 %x, i64* %p) { define i1 @uaddo_i64_decrement_alt(i64 %x, i64* %p) { ; CHECK-LABEL: @uaddo_i64_decrement_alt( -; CHECK-NEXT: [[A:%.*]] = add i64 [[X:%.*]], -1 -; CHECK-NEXT: store i64 [[A]], i64* [[P:%.*]] -; CHECK-NEXT: [[OV:%.*]] = icmp ne i64 [[X]], 0 -; CHECK-NEXT: ret i1 [[OV]] +; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 -1) +; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0 +; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1 +; CHECK-NEXT: store i64 [[MATH]], i64* [[P:%.*]] +; CHECK-NEXT: ret i1 [[OV1]] ; %a = add i64 %x, -1 store i64 %a, i64* %p @@ -207,10 +210,11 @@ define i1 @uaddo_i64_decrement_alt(i64 %x, i64* %p) { define i1 @uaddo_i64_decrement_alt_dom(i64 %x, i64* %p) { ; CHECK-LABEL: @uaddo_i64_decrement_alt_dom( -; CHECK-NEXT: [[OV:%.*]] = icmp ne i64 [[X:%.*]], 0 -; CHECK-NEXT: [[A:%.*]] = add i64 [[X]], -1 -; CHECK-NEXT: store i64 [[A]], i64* [[P:%.*]] -; CHECK-NEXT: ret i1 [[OV]] +; CHECK-NEXT: [[TMP1:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[X:%.*]], i64 -1) +; CHECK-NEXT: [[MATH:%.*]] = extractvalue { i64, i1 } [[TMP1]], 0 +; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i64, i1 } [[TMP1]], 1 +; CHECK-NEXT: store i64 [[MATH]], i64* [[P:%.*]] +; CHECK-NEXT: ret i1 [[OV1]] ; %ov = icmp ne i64 %x, 0 %a = add i64 %x, -1 |
