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author | Hiroshi Yamauchi <yamauchi@google.com> | 2019-11-07 08:52:05 -0800 |
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committer | Hiroshi Yamauchi <yamauchi@google.com> | 2019-12-13 11:01:19 -0800 |
commit | ed50e6060b1c51ec4a5dad6c01a64a5f1526cdb5 (patch) | |
tree | 37d8f7b176433842632163acbe3c503a92872b21 /llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll | |
parent | d6c445ea6907c7165ace0167327d557b0a786604 (diff) | |
download | bcm5719-llvm-ed50e6060b1c51ec4a5dad6c01a64a5f1526cdb5.tar.gz bcm5719-llvm-ed50e6060b1c51ec4a5dad6c01a64a5f1526cdb5.zip |
[PGO][PGSO] Enable size optimizations in code gen / target passes for cold code.
Summary: Split off of D67120.
Reviewers: davidxl
Subscribers: hiraditya, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71288
Diffstat (limited to 'llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll')
-rw-r--r-- | llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll index 4d28e06f252..7a5a2ebd698 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll @@ -152,6 +152,30 @@ rare.1: br label %fallthrough } +; Negative test - opt for size +define void @test6_pgso(i1 %cond, i64* %base) !prof !14 { +; CHECK-LABEL: @test6 +entry: +; CHECK: %addr = getelementptr + %addr = getelementptr inbounds i64, i64* %base, i64 5 + %casted = bitcast i64* %addr to i32* + br i1 %cond, label %if.then, label %fallthrough + +if.then: +; CHECK-LABEL: if.then: +; CHECK-NOT: getelementptr inbounds i8, {{.+}} 40 + %v1 = load i32, i32* %casted, align 4 + call void @foo(i32 %v1) + %cmp = icmp eq i32 %v1, 0 + br i1 %cmp, label %rare.1, label %fallthrough + +fallthrough: + ret void + +rare.1: + call void @slowpath(i32 %v1, i32* %casted) cold + br label %fallthrough +} ; Make sure sinking two copies of addressing mode into different blocks works ; when there are cold paths for each. @@ -278,3 +302,20 @@ BB: store i1 false, i1* %G23 ret void } + +!llvm.module.flags = !{!0} +!0 = !{i32 1, !"ProfileSummary", !1} +!1 = !{!2, !3, !4, !5, !6, !7, !8, !9} +!2 = !{!"ProfileFormat", !"InstrProf"} +!3 = !{!"TotalCount", i64 10000} +!4 = !{!"MaxCount", i64 10} +!5 = !{!"MaxInternalCount", i64 1} +!6 = !{!"MaxFunctionCount", i64 1000} +!7 = !{!"NumCounts", i64 3} +!8 = !{!"NumFunctions", i64 3} +!9 = !{!"DetailedSummary", !10} +!10 = !{!11, !12, !13} +!11 = !{i32 10000, i64 100, i32 1} +!12 = !{i32 999000, i64 100, i32 1} +!13 = !{i32 999999, i64 1, i32 2} +!14 = !{!"function_entry_count", i64 0} |