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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-06-20 15:19:02 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-06-20 15:19:02 +0000
commit4822b5b649f0086aa8339c2def1dbdd303dcb257 (patch)
tree5d1fd4337c1b16996be86a11d5125ea9cfef9c65 /llvm/test/Transforms/CodeGenPrepare/X86/memcmp.ll
parent208ddc5bdc554ed7c90d4515a04bb8f720b82213 (diff)
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[X86][SSE] Relax 0/-1 vector element insertion to work for any vector with >=16bit elements
Shuffle lowering/combining now does a good job for 256/512-bit vectors - we don't need to prevent this llvm-svn: 305801
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