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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-12 09:17:10 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-12 09:17:10 +0000 |
| commit | 6d4bd283221b438509d97af251756151b706a52d (patch) | |
| tree | dea8fa8803d72c1b576406c9cc1a6f4fa35da063 /llvm/test/Transforms/CodeExtractor | |
| parent | b820405b59b12fd9eff51957118bdddd6519b8a4 (diff) | |
| download | bcm5719-llvm-6d4bd283221b438509d97af251756151b706a52d.tar.gz bcm5719-llvm-6d4bd283221b438509d97af251756151b706a52d.zip | |
[SystemZ] Optimize sign-extends of vector setccs
Normal (sext (setcc ...)) sequences are optimised into
(select_cc ..., -1, 0) by DAGCombiner::visitSIGN_EXTEND.
However, this is deliberately not done for vectors, and after
vector type legalization we have (sext_inreg (setcc ...)) instead.
I wondered about trying to extend DAGCombiner to handle this case too,
but it seemed to be a loss on some other targets I tried, even those for
which SETCC isn't "legal" and SELECT_CC is.
llvm-svn: 186149
Diffstat (limited to 'llvm/test/Transforms/CodeExtractor')
0 files changed, 0 insertions, 0 deletions

