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| author | Craig Topper <craig.topper@gmail.com> | 2016-06-29 03:46:47 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-06-29 03:46:47 +0000 |
| commit | 2cc199baff23cd61cb9d28865ca9ffe4574f3c31 (patch) | |
| tree | 816d672d445f4a0ef677c91c96d2aa3cb2e5c8c6 /llvm/test/Transforms/BBVectorize/loop1.ll | |
| parent | 3a011de10cffec5d37819aa5f4234603dc037d33 (diff) | |
| download | bcm5719-llvm-2cc199baff23cd61cb9d28865ca9ffe4574f3c31.tar.gz bcm5719-llvm-2cc199baff23cd61cb9d28865ca9ffe4574f3c31.zip | |
[ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for a recurrence with a NSW addition.
If a operation for a recurrence is an addition with no signed wrap and both input sign bits are 0, then the result sign bit must also be 0. Similar for the negative case.
I found this deficiency while playing around with a loop in the x86 backend that contained a signed division that could be optimized into an unsigned division if we could prove both inputs were positive. One of them being the loop induction variable. With this patch we can perform the conversion for this case. One of the test cases here is a contrived variation of the loop I was looking at.
Differential revision: http://reviews.llvm.org/D21493
llvm-svn: 274098
Diffstat (limited to 'llvm/test/Transforms/BBVectorize/loop1.ll')
| -rw-r--r-- | llvm/test/Transforms/BBVectorize/loop1.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/Transforms/BBVectorize/loop1.ll b/llvm/test/Transforms/BBVectorize/loop1.ll index 70a5def4222..445dec1516d 100644 --- a/llvm/test/Transforms/BBVectorize/loop1.ll +++ b/llvm/test/Transforms/BBVectorize/loop1.ll @@ -83,7 +83,7 @@ for.body: ; preds = %for.body, %entry ; CHECK-UNRL: %add12 = fadd <2 x double> %add7, %mul11 ; CHECK-UNRL: %4 = bitcast double* %arrayidx14 to <2 x double>* ; CHECK-UNRL: store <2 x double> %add12, <2 x double>* %4, align 8 -; CHECK-UNRL: %indvars.iv.next.1 = add nsw i64 %indvars.iv, 2 +; CHECK-UNRL: %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2 ; CHECK-UNRL: %lftr.wideiv.1 = trunc i64 %indvars.iv.next.1 to i32 ; CHECK-UNRL: %exitcond.1 = icmp eq i32 %lftr.wideiv.1, 10 ; CHECK-UNRL: br i1 %exitcond.1, label %for.end, label %for.body |
