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| author | Craig Topper <craig.topper@intel.com> | 2017-11-28 19:25:45 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-28 19:25:45 +0000 |
| commit | dd4295626b9e4fc7cc97a35833a587dd4f240212 (patch) | |
| tree | 882031b30c484247c1544147e7d3c86ed9a4a0b5 /llvm/test/Other/pass-pipeline-parsing.ll | |
| parent | 3aa8eaa9512efc22945a12bc9db074c953baac8e (diff) | |
| download | bcm5719-llvm-dd4295626b9e4fc7cc97a35833a587dd4f240212.tar.gz bcm5719-llvm-dd4295626b9e4fc7cc97a35833a587dd4f240212.zip | |
[X86] In lowerVectorShuffleAsElementInsertion, if were able to find a scalar i8 or i16 and need to zero extend it, make sure we use a vXi32 type of the full vector width.
Previously, this was hardcoded to v4i32, but if the input type is 256 bits we need to use v8i32.
Fixes PR35443
llvm-svn: 319208
Diffstat (limited to 'llvm/test/Other/pass-pipeline-parsing.ll')
0 files changed, 0 insertions, 0 deletions
