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| author | Nirav Dave <niravd@google.com> | 2017-06-30 12:23:41 +0000 |
|---|---|---|
| committer | Nirav Dave <niravd@google.com> | 2017-06-30 12:23:41 +0000 |
| commit | c5a48c1ee8a5b91dd91871a7be5e597fe4400918 (patch) | |
| tree | 25ebc1f3df6057943aa768ee0ea2351e0c61672d /llvm/test/Object/simple-archive.test | |
| parent | f0e58816e48c0bd0ddd97b87cb54b096feb8a8a8 (diff) | |
| download | bcm5719-llvm-c5a48c1ee8a5b91dd91871a7be5e597fe4400918.tar.gz bcm5719-llvm-c5a48c1ee8a5b91dd91871a7be5e597fe4400918.zip | |
[DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
As discussed in D34087, rewrite areNonVolatileConsecutiveLoads using
generic checks. Also, propagate missing local handling from there to
BaseIndexOffset checks.
Tests of note:
* test/CodeGen/X86/build-vector* - Improved.
* test/CodeGen/BPF/undef.ll - Improved store alignment allows an
additional store merge
* test/CodeGen/X86/clear_upper_vector_element_bits.ll - This is a
case we already do not handle well. Here, the DAG is improved, but
scheduling causes a code size degradation.
Reviewers: RKSimon, craig.topper, spatel, andreadb, filcab
Subscribers: nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D34472
llvm-svn: 306819
Diffstat (limited to 'llvm/test/Object/simple-archive.test')
0 files changed, 0 insertions, 0 deletions
