[GlobalISel] Add a G_BRJT opcode.

This is a branch opcode that takes a jump table pointer, jump table index and an
index into the table to do an indirect branch.

We pass both the table pointer and JTI to allow targets like ARM64 to more
easily use the existing jump table compression optimization without having to
walk up the block to find a paired G_JUMP_TABLE.

Differential Revision: https://reviews.llvm.org/D63159

llvm-svn: 363434

1 files changed, 30 insertions, 0 deletions

diff --git a/llvm/test/MachineVerifier/test_g_brjt.mir b/llvm/test/MachineVerifier/test_g_brjt.mir
new file mode 100644
index 00000000000..e05dd5fadbc
--- /dev/null
+++ b/llvm/test/MachineVerifier/test_g_brjt.mir
@@ -0,0 +1,30 @@
+# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: global-isel, aarch64-registered-target
+
+---
+name:            test_jump_table
+legalized:       true
+tracksRegLiveness: true
+jumpTable:
+  kind:            block-address
+  entries:
+    - id:              0
+      blocks:          [ '%bb.0' ]
+body:             |
+  bb.0:
+    liveins: $x0
+    %0:_(s64) = COPY $x0
+    %1:_(p0) = COPY $x0
+    ; CHECK: Bad machine code: Too few operands
+    G_BRJT
+
+    ; CHECK: G_BRJT src operand 0 must be a pointer type
+    G_BRJT %0, %jump-table.0, %0
+
+    ; CHECK: G_BRJT src operand 1 must be a jump table index
+    G_BRJT %1, %0, %0
+
+    ; CHECK: G_BRJT src operand 2 must be a scalar reg type
+    G_BRJT %1, %jump-table.0, %1
+
+...