Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot errors in lld tests.

It's currently unable to parse 'sym + imm' without surrounding parenthesis.

llvm-svn: 205237

15 files changed, 53 insertions, 65 deletions

diff --git a/llvm/test/MC/Mips/cfi.s b/llvm/test/MC/Mips/cfi.s
deleted file mode 100644
index a3247b5479a..00000000000
--- a/llvm/test/MC/Mips/cfi.s
+++ /dev/null
@@ -1,13 +0,0 @@
-# RUN: llvm-mc %s -triple=mips-unknown-unknown -show-encoding -mcpu=mips32 | \
-# RUN:     FileCheck %s
-# RUN: llvm-mc %s -triple=mips64-unknown-unknown -show-encoding -mcpu=mips64 | \
-# RUN:     FileCheck %s
-
-# Check that we can accept register names in CFI directives and that they are
-# canonicalised to their DWARF register numbers.
-
-        .cfi_startproc         # CHECK: .cfi_startproc
-        .cfi_register   $6, $5 # CHECK: .cfi_register 6, 5
-        .cfi_def_cfa    $fp, 8 # CHECK: .cfi_def_cfa 30, 8
-        .cfi_def_cfa    $2, 16 # CHECK: .cfi_def_cfa 2, 16
-        .cfi_endproc           # CHECK: .cfi_endproc
diff --git a/llvm/test/MC/Mips/mips-register-names-invalid.s b/llvm/test/MC/Mips/mips-register-names-invalid.s
index e6f8416a41e..df1054fed42 100644
--- a/llvm/test/MC/Mips/mips-register-names-invalid.s
+++ b/llvm/test/MC/Mips/mips-register-names-invalid.s
@@ -4,5 +4,5 @@
 # $32 used to trigger an assertion instead of the usual error message due to
 # an off-by-one bug.
 
-# CHECK: :[[@LINE+1]]:17: error: invalid operand for instruction
+# CHECK: :[[@LINE+1]]:18: error: invalid operand for instruction
         add     $32, $0, $0
diff --git a/llvm/test/MC/Mips/mips3/valid-xfail.s b/llvm/test/MC/Mips/mips3/valid-xfail.s
index 7f802ef765f..dd4e482f381 100644
--- a/llvm/test/MC/Mips/mips3/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips3/valid-xfail.s
@@ -8,6 +8,10 @@
 # XFAIL: *
 
 	.set noat
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	divu	$zero,$t9,$t7
 	ehb
 	lwc3	$10,-32265($k0)
 	ssnop
diff --git a/llvm/test/MC/Mips/mips3/valid.s b/llvm/test/MC/Mips/mips3/valid.s
index 703d49a4ea7..f5c98f0007e 100644
--- a/llvm/test/MC/Mips/mips3/valid.s
+++ b/llvm/test/MC/Mips/mips3/valid.s
@@ -35,12 +35,8 @@
 	dadd	$s3,$at,$ra
 	daddi	$sp,$s4,-27705
 	daddiu	$k0,$s6,-4586
-	ddiv	$zero,$k0,$s3
-	ddivu	$zero,$s0,$s1
-	div	$zero,$t9,$t3
 	div.d	$f29,$f20,$f27
 	div.s	$f4,$f5,$f15
-	divu	$zero,$t9,$t7
 	dmfc1	$t4,$f13
 	dmtc1	$s0,$f14
 	dmult	$s7,$t1
diff --git a/llvm/test/MC/Mips/mips32r2/valid-xfail.s b/llvm/test/MC/Mips/mips32r2/valid-xfail.s
index 5dbb1d3b497..dff3ae43f1e 100644
--- a/llvm/test/MC/Mips/mips32r2/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips32r2/valid-xfail.s
@@ -2,7 +2,7 @@
 # they aren't implemented yet).
 # This test is set up to XPASS if any instruction generates an encoding.
 #
-# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | not FileCheck %s
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
 # CHECK-NOT: encoding
 # XFAIL: *
 
@@ -48,6 +48,7 @@
 	c.nge.d	$fcc5,$f21,$f16
 	c.nge.ps	$f1,$f26
 	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.d	$f29,$f29
 	c.ngl.ps	$f21,$f30
 	c.ngl.s	$fcc2,$f31,$f23
 	c.ngle.ps	$fcc7,$f12,$f20
@@ -65,6 +66,7 @@
 	c.seq.ps	$fcc6,$f31,$f14
 	c.seq.s	$fcc7,$f1,$f25
 	c.sf.ps	$fcc6,$f4,$f6
+	c.sf.s	$f14,$f22
 	c.ueq.d	$fcc4,$f13,$f25
 	c.ueq.ps	$fcc1,$f5,$f29
 	c.ueq.s	$fcc6,$f3,$f30
@@ -94,10 +96,14 @@
 	cmpu.lt.qb	$at,$a3
 	ctcmsa	$31,$s7
 	cvt.d.l	$f4,$f16
+	cvt.l.d	$f24,$f15
+	cvt.l.s	$f11,$f29
 	cvt.ps.s	$f3,$f18,$f19
 	cvt.s.l	$f15,$f30
 	cvt.s.pl	$f30,$f1
 	cvt.s.pu	$f14,$f25
+	div	$zero,$t9,$t3
+	divu	$zero,$t9,$t7
 	dmt	$k0
 	dpa.w.ph	$ac1,$s7,$k0
 	dpaq_s.w.ph	$ac2,$a0,$t5
@@ -146,6 +152,8 @@
 	flog2.w	$w19,$w23
 	floor.l.d	$f26,$f7
 	floor.l.s	$f12,$f5
+	floor.w.d	$f14,$f11
+	floor.w.s	$f8,$f9
 	fork	$s2,$t0,$a0
 	frcp.d	$w12,$w4
 	frcp.w	$w30,$w8
@@ -220,8 +228,12 @@
 	nlzc.d	$w14,$w14
 	nlzc.h	$w24,$w24
 	nlzc.w	$w10,$w4
+	nmadd.d	$f18,$f9,$f14,$f19
 	nmadd.ps	$f27,$f4,$f9,$f25
+	nmadd.s	$f0,$f5,$f25,$f12
+	nmsub.d	$f30,$f8,$f16,$f30
 	nmsub.ps	$f6,$f12,$f14,$f17
+	nmsub.s	$f1,$f24,$f19,$f4
 	nor.v	$w20,$w20,$w15
 	or.v	$w13,$w23,$w12
 	packrl.ph	$ra,$t8,$t6
@@ -252,6 +264,7 @@
 	pul.ps	$f9,$f30,$f26
 	puu.ps	$f24,$f9,$f2
 	raddu.w.qb	$t9,$s3
+	rdhwr	$sp,$11
 	rdpgpr	$s3,$t1
 	recip.d	$f19,$f6
 	recip.s	$f3,$f30
@@ -298,6 +311,7 @@
 	swe	$t8,94($k0)
 	swle	$v1,-209($gp)
 	swre	$k0,-202($s2)
+	swxc1	$f19,$t4($k0)
 	synci	20023($s0)
 	tlbginv
 	tlbginvf
diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s
index 29c0807fff1..03f51554250 100644
--- a/llvm/test/MC/Mips/mips32r2/valid.s
+++ b/llvm/test/MC/Mips/mips32r2/valid.s
@@ -11,10 +11,8 @@
 	addi	$t5,$t1,26322
 	addu	$t1,$a0,$a2
 	and	$s7,$v0,$t4
-	c.ngl.d	$f29,$f29
 	c.ngle.d	$f0,$f16
 	c.sf.d	$f30,$f0
-	c.sf.s	$f14,$f22
 	ceil.w.d	$f11,$f25
 	ceil.w.s	$f6,$f20
 	cfc1	$s1,$21
@@ -23,22 +21,16 @@
 	ctc1	$a2,$26
 	cvt.d.s	$f22,$f28
 	cvt.d.w	$f26,$f11
-	cvt.l.d	$f24,$f15
-	cvt.l.s	$f11,$f29
 	cvt.s.d	$f26,$f8
 	cvt.s.w	$f22,$f15
 	cvt.w.d	$f20,$f14
 	cvt.w.s	$f20,$f24
 	deret
 	di	$s8
-	div	$zero,$t9,$t3
 	div.d	$f29,$f20,$f27
 	div.s	$f4,$f5,$f15
-	divu	$zero,$t9,$t7
 	ei	$t6
 	eret
-	floor.w.d	$f14,$f11
-	floor.w.s	$f8,$f9
 	lb	$t8,-14515($t2)
 	lbu	$t0,30195($v1)
 	ldc1	$f11,16391($s0)
@@ -102,14 +94,9 @@
 	multu	$t1,$s2
 	neg.d	$f27,$f18
 	neg.s	$f1,$f15
-	nmadd.d	$f18,$f9,$f14,$f19
-	nmadd.s	$f0,$f5,$f25,$f12
-	nmsub.d	$f30,$f8,$f16,$f30
-	nmsub.s	$f1,$f24,$f19,$f4
 	nop
 	nor	$a3,$zero,$a3
 	or	$t4,$s0,$sp
-	rdhwr	$sp,$11
 	round.w.d	$f6,$f4
 	round.w.s	$f27,$f28
 	sb	$s6,-19857($t6)
@@ -139,7 +126,6 @@
 	swc2	$25,24880($s0)
 	swl	$t7,13694($s3)
 	swr	$s1,-26590($t6)
-	swxc1	$f19,$t4($k0)
 	teqi	$s5,-17504
 	tgei	$s1,5025
 	tgeiu	$sp,-28621
diff --git a/llvm/test/MC/Mips/mips4/valid-xfail.s b/llvm/test/MC/Mips/mips4/valid-xfail.s
index 26749a91532..7599164af0b 100644
--- a/llvm/test/MC/Mips/mips4/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips4/valid-xfail.s
@@ -36,6 +36,10 @@
 	c.ult.s	$fcc7,$f24,$f10
 	c.un.d	$fcc6,$f23,$f24
 	c.un.s	$fcc1,$f30,$f4
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	divu	$zero,$t9,$t7
 	ehb
 	madd.d	$f18,$f19,$f26,$f20
 	madd.s	$f1,$f31,$f19,$f25
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index bcc9f689bfa..66886c5794e 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -35,12 +35,8 @@
 	dadd	$s3,$at,$ra
 	daddi	$sp,$s4,-27705
 	daddiu	$k0,$s6,-4586
-	ddiv	$zero,$k0,$s3
-	ddivu	$zero,$s0,$s1
-	div	$zero,$t9,$t3
 	div.d	$f29,$f20,$f27
 	div.s	$f4,$f5,$f15
-	divu	$zero,$t9,$t7
 	dmfc1	$t4,$f13
 	dmtc1	$s0,$f14
 	dmult	$s7,$t1
diff --git a/llvm/test/MC/Mips/mips5/valid-xfail.s b/llvm/test/MC/Mips/mips5/valid-xfail.s
index 285aabbfe6b..10931587e45 100644
--- a/llvm/test/MC/Mips/mips5/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips5/valid-xfail.s
@@ -58,6 +58,10 @@
 	cvt.ps.s	$f3,$f18,$f19
 	cvt.s.pl	$f30,$f1
 	cvt.s.pu	$f14,$f25
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	divu	$zero,$t9,$t7
 	ehb
 	madd.d	$f18,$f19,$f26,$f20
 	madd.ps	$f22,$f3,$f14,$f3
diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s
index 64c2ff5e789..7665d1f025e 100644
--- a/llvm/test/MC/Mips/mips5/valid.s
+++ b/llvm/test/MC/Mips/mips5/valid.s
@@ -35,12 +35,8 @@
 	dadd	$s3,$at,$ra
 	daddi	$sp,$s4,-27705
 	daddiu	$k0,$s6,-4586
-	ddiv	$zero,$k0,$s3
-	ddivu	$zero,$s0,$s1
-	div	$zero,$t9,$t3
 	div.d	$f29,$f20,$f27
 	div.s	$f4,$f5,$f15
-	divu	$zero,$t9,$t7
 	dmfc1	$t4,$f13
 	dmtc1	$s0,$f14
 	dmult	$s7,$t1
diff --git a/llvm/test/MC/Mips/mips64/valid-xfail.s b/llvm/test/MC/Mips/mips64/valid-xfail.s
index 66f15e03c24..11ed7747b24 100644
--- a/llvm/test/MC/Mips/mips64/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips64/valid-xfail.s
@@ -60,6 +60,10 @@
 	cvt.ps.s	$f3,$f18,$f19
 	cvt.s.pl	$f30,$f1
 	cvt.s.pu	$f14,$f25
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	divu	$zero,$t9,$t7
 	dmfc0	$t2,c0_watchhi,2
 	dmtc0	$t7,c0_datalo
 	ehb
diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s
index 673754535bc..cfd708ce667 100644
--- a/llvm/test/MC/Mips/mips64/valid.s
+++ b/llvm/test/MC/Mips/mips64/valid.s
@@ -39,12 +39,8 @@
 	dclo	$s2,$a2
 	dclz	$s0,$t9
 	deret
-	ddiv	$zero,$k0,$s3
-	ddivu	$zero,$s0,$s1
-	div	$zero,$t9,$t3
 	div.d	$f29,$f20,$f27
 	div.s	$f4,$f5,$f15
-	divu	$zero,$t9,$t7
 	dmfc1	$t4,$f13
 	dmtc1	$s0,$f14
 	dmult	$s7,$t1
diff --git a/llvm/test/MC/Mips/mips64r2/valid-xfail.s b/llvm/test/MC/Mips/mips64r2/valid-xfail.s
index 3e725ea9683..7279707ea0b 100644
--- a/llvm/test/MC/Mips/mips64r2/valid-xfail.s
+++ b/llvm/test/MC/Mips/mips64r2/valid-xfail.s
@@ -5,6 +5,7 @@
 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | not FileCheck %s
 # CHECK-NOT: encoding
 # XFAIL: *
+# REQUIRES: asserts
 
 	.set noat
 	abs.ps	$f22,$f8
@@ -51,6 +52,7 @@
 	c.nge.d	$fcc5,$f21,$f16
 	c.nge.ps	$f1,$f26
 	c.nge.s	$fcc3,$f11,$f8
+	c.ngl.d	$f29,$f29
 	c.ngl.ps	$f21,$f30
 	c.ngl.s	$fcc2,$f31,$f23
 	c.ngle.ps	$fcc7,$f12,$f20
@@ -68,6 +70,7 @@
 	c.seq.ps	$fcc6,$f31,$f14
 	c.seq.s	$fcc7,$f1,$f25
 	c.sf.ps	$fcc6,$f4,$f6
+	c.sf.s	$f14,$f22
 	c.ueq.d	$fcc4,$f13,$f25
 	c.ueq.ps	$fcc1,$f5,$f29
 	c.ueq.s	$fcc6,$f3,$f30
@@ -95,6 +98,10 @@
 	cmpu.lt.qb	$at,$a3
 	cvt.s.pl	$f30,$f1
 	cvt.s.pu	$f14,$f25
+	ddiv	$zero,$k0,$s3
+	ddivu	$zero,$s0,$s1
+	div	$zero,$t9,$t3
+	divu	$zero,$t9,$t7
 	dmfc0	$t2,c0_watchhi,2
 	dmfgc0	$gp,c0_perfcnt,6
 	dmt	$k0
@@ -117,6 +124,8 @@
 	dpsu.h.qbr	$ac2,$a1,$s6
 	dpsx.w.ph	$ac0,$s7,$gp
 	drorv	$at,$a1,$s7
+	dsbh	$v1,$t6
+	dshd	$v0,$sp
 	dvpe	$s6
 	ehb
 	emt	$t0
@@ -179,6 +188,7 @@
 	lwx	$t4,$t4($s4)
 	madd.d	$f18,$f19,$f26,$f20
 	madd.ps	$f22,$f3,$f14,$f3
+	madd.s	$f1,$f31,$f19,$f25
 	maq_s.w.phl	$ac2,$t9,$t3
 	maq_s.w.phr	$ac0,$t2,$t9
 	maq_sa.w.phl	$ac3,$a1,$v1
@@ -196,6 +206,7 @@
 	msub	$ac2,$sp,$t6
 	msub.d	$f10,$f1,$f31,$f18
 	msub.ps	$f12,$f14,$f29,$f17
+	msub.s	$f12,$f19,$f10,$f16
 	msubu	$ac2,$a1,$t8
 	mtc0	$t1,c0_datahi1
 	mtgc0	$s4,$21,7
@@ -225,8 +236,10 @@
 	nlzc.w	$w10,$w4
 	nmadd.d	$f18,$f9,$f14,$f19
 	nmadd.ps	$f27,$f4,$f9,$f25
+	nmadd.s	$f0,$f5,$f25,$f12
 	nmsub.d	$f30,$f8,$f16,$f30
 	nmsub.ps	$f6,$f12,$f14,$f17
+	nmsub.s	$f1,$f24,$f19,$f4
 	nor.v	$w20,$w20,$w15
 	or.v	$w13,$w23,$w12
 	packrl.ph	$ra,$t8,$t6
@@ -257,6 +270,7 @@
 	pul.ps	$f9,$f30,$f26
 	puu.ps	$f24,$f9,$f2
 	raddu.w.qb	$t9,$s3
+	rdhwr	$sp,$11
 	rdpgpr	$s3,$t1
 	recip.d	$f19,$f6
 	recip.s	$f3,$f30
@@ -268,6 +282,8 @@
 	rsqrt.s	$f4,$f8
 	sbe	$s7,33($s1)
 	sce	$sp,189($t2)
+	seb	$t9,$t7
+	seh	$v1,$t4
 	she	$t8,105($v0)
 	shilo	$ac1,26
 	shilov	$ac2,$t2
@@ -314,5 +330,6 @@
 	tlbwi
 	tlbwr
 	wrpgpr	$zero,$t5
+	wsbh	$k1,$t1
 	xor.v	$w20,$w21,$w30
 	yield	$v1,$s0
diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s
index 4e549af9e79..e1d80199c34 100644
--- a/llvm/test/MC/Mips/mips64r2/valid.s
+++ b/llvm/test/MC/Mips/mips64r2/valid.s
@@ -11,10 +11,8 @@
 	addi	$t5,$t1,26322
 	addu	$t1,$a0,$a2
 	and	$s7,$v0,$t4
-	c.ngl.d	$f29,$f29
 	c.ngle.d	$f0,$f16
 	c.sf.d	$f30,$f0
-	c.sf.s	$f14,$f22
 	ceil.l.d	$f1,$f3
 	ceil.l.s	$f18,$f13
 	ceil.w.d	$f11,$f25
@@ -40,18 +38,12 @@
 	dclz	$s0,$t9
 	deret
 	di	$s8
-	ddiv	$zero,$k0,$s3
-	ddivu	$zero,$s0,$s1
-	div	$zero,$t9,$t3
 	div.d	$f29,$f20,$f27
 	div.s	$f4,$f5,$f15
-	divu	$zero,$t9,$t7
 	dmfc1	$t4,$f13
 	dmtc1	$s0,$f14
 	dmult	$s7,$t1
 	dmultu	$a1,$a2
-	dsbh	$v1,$t6
-	dshd	$v0,$sp
 	dsllv	$zero,$s4,$t4
 	dsrav	$gp,$s2,$s3
 	dsrlv	$s3,$t6,$s4
@@ -87,7 +79,6 @@
 	lwxc1	$f12,$s1($s8)
 	madd	$s6,$t5
 	madd	$zero,$t1
-	madd.s	$f1,$f31,$f19,$f25
 	maddu	$s3,$gp
 	maddu	$t8,$s2
 	mfc0	$a2,$14,1
@@ -115,7 +106,6 @@
 	movz.d	$f12,$f29,$t1
 	movz.s	$f25,$f7,$v1
 	msub	$s7,$k1
-	msub.s	$f12,$f19,$f10,$f16
 	msubu	$t7,$a1
 	mtc1	$s8,$f9
 	mthc1	$zero,$f16
@@ -131,12 +121,9 @@
 	multu	$t1,$s2
 	neg.d	$f27,$f18
 	neg.s	$f1,$f15
-	nmadd.s	$f0,$f5,$f25,$f12
-	nmsub.s	$f1,$f24,$f19,$f4
 	nop
 	nor	$a3,$zero,$a3
 	or	$t4,$s0,$sp
-	rdhwr	$sp,$11
 	round.l.d	$f12,$f1
 	round.l.s	$f25,$f5
 	round.w.d	$f6,$f4
@@ -150,8 +137,6 @@
 	sdl	$a3,-20961($s8)
 	sdr	$t3,-20423($t4)
 	sdxc1	$f11,$t2($t6)
-	seb	$t9,$t7
-	seh	$v1,$t4
 	sh	$t6,-6704($t7)
 	sllv	$a3,$zero,$t1
 	slt	$s7,$t3,$k1
@@ -184,4 +169,3 @@
 	trunc.w.d	$f22,$f15
 	trunc.w.s	$f28,$f30
 	xor	$s2,$a0,$s8
-	wsbh	$k1,$t1
diff --git a/llvm/test/MC/Mips/set-at-directive-explicit-at.s b/llvm/test/MC/Mips/set-at-directive-explicit-at.s
index 1bd26ffa855..71f1a98fae4 100644
--- a/llvm/test/MC/Mips/set-at-directive-explicit-at.s
+++ b/llvm/test/MC/Mips/set-at-directive-explicit-at.s
@@ -7,12 +7,12 @@
     .text
 foo:
 # CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
-# WARNINGS: :[[@LINE+2]]:11: warning: Used $at without ".set noat"
+# WARNINGS: :[[@LINE+2]]:12: warning: Used $at without ".set noat"
     .set    at=$1
     jr    $at
 
 # CHECK:   jr    $1                      # encoding: [0x08,0x00,0x20,0x00]
-# WARNINGS: :[[@LINE+2]]:11: warning: Used $at without ".set noat"
+# WARNINGS: :[[@LINE+2]]:12: warning: Used $at without ".set noat"
     .set    at=$1
     jr    $1
 # WARNINGS-NOT: warning: Used $at without ".set noat"
@@ -31,12 +31,12 @@ foo:
     jr    $at
 
 # CHECK:   jr    $16                     # encoding: [0x08,0x00,0x00,0x02]
-# WARNINGS: :[[@LINE+2]]:11: warning: Used $16 with ".set at=$16"
+# WARNINGS: :[[@LINE+2]]:12: warning: Used $16 with ".set at=$16"
     .set    at=$16
     jr    $s0
 
 # CHECK:   jr    $16                     # encoding: [0x08,0x00,0x00,0x02]
-# WARNINGS: :[[@LINE+2]]:11: warning: Used $16 with ".set at=$16"
+# WARNINGS: :[[@LINE+2]]:12: warning: Used $16 with ".set at=$16"
     .set    at=$16
     jr    $16
 # WARNINGS-NOT: warning