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authorSam Parker <sam.parker@arm.com>2017-03-15 14:06:42 +0000
committerSam Parker <sam.parker@arm.com>2017-03-15 14:06:42 +0000
commitdb20d483360c718d80b46ea0f3e4a43a1bfedd2f (patch)
tree5c566199420e8d40b8c72d4ed0068b65576aa531 /llvm/test/MC
parent5c4c61184a02b02f49793c0ec91138df56089461 (diff)
downloadbcm5719-llvm-db20d483360c718d80b46ea0f3e4a43a1bfedd2f.tar.gz
bcm5719-llvm-db20d483360c718d80b46ea0f3e4a43a1bfedd2f.zip
Reverting r297821 due to breaking lld test.
llvm-svn: 297838
Diffstat (limited to 'llvm/test/MC')
-rw-r--r--llvm/test/MC/ARM/branch-disassemble.s15
-rw-r--r--llvm/test/MC/ARM/coff-relocations.s98
2 files changed, 49 insertions, 64 deletions
diff --git a/llvm/test/MC/ARM/branch-disassemble.s b/llvm/test/MC/ARM/branch-disassemble.s
deleted file mode 100644
index 76cdea3292d..00000000000
--- a/llvm/test/MC/ARM/branch-disassemble.s
+++ /dev/null
@@ -1,15 +0,0 @@
-@ RUN: llvm-mc -mcpu=cortex-a9 -triple armv7.arm-none-eabi -filetype obj -o - %s \
-@ RUN: | llvm-objdump -mcpu=cortex-a9 -triple armv7.arm-none-eabi -d - \
-@ RUN: | FileCheck %s -check-prefix CHECK-ARM
-
-@ RUN: llvm-mc -mcpu=cortex-m3 -triple thumbv7.arm-none-eabi -filetype obj -o - %s \
-@ RUN: | llvm-objdump -mcpu=cortex-m3 -triple thumbv7.arm-none-eabi -d - \
-@ RUN: | FileCheck %s -check-prefix CHECK-THUMB
-
-b.w .Lbranch
-@ CHECK-ARM: b #4 <$a.0+0xC>
-@ CHECK-THUMB: b.w #8 <$t.0+0xC>
-adds r0, r1, #42
-adds r1, r2, #42
-.Lbranch:
-movs r2, r3
diff --git a/llvm/test/MC/ARM/coff-relocations.s b/llvm/test/MC/ARM/coff-relocations.s
index d0c56b048cb..fa2d407bb8f 100644
--- a/llvm/test/MC/ARM/coff-relocations.s
+++ b/llvm/test/MC/ARM/coff-relocations.s
@@ -11,49 +11,49 @@
.global target
.thumb_func
-branch24t:
- b target
-
-@ CHECK-ENCODING-LABEL: branch24t:
-@ CHECK-ENCODING-NEXT: b.w #0
-
- .thumb_func
-branch20t:
- bcc target
-
-@ CHECK-ENCODING-LABEL: branch20t:
-@ CHECK-ENCODING-NEXT: blo.w #0
-
- .thumb_func
-blx23t:
- bl target
-
-@ CHECK-ENCODING-LABEL: blx23t:
-@ CHECK-ENCODING-NEXT: bl #0
-
- .thumb_func
+branch24t:
+ b target
+
+@ CHECK-ENCODING-LABEL: branch24t
+@ CHECK-ENCODING-NEXT: b.w #0
+
+ .thumb_func
+branch20t:
+ bcc target
+
+@ CHECK-ENCODING-LABEL: branch20t
+@ CHECK-ENCODING-NEXT: blo.w #0
+
+ .thumb_func
+blx23t:
+ bl target
+
+@ CHECK-ENCODING-LABEL: blx23t
+@ CHECK-ENCODING-NEXT: bl #0
+
+ .thumb_func
mov32t:
movw r0, :lower16:target
- movt r0, :upper16:target
- blx r0
-
-@ CHECK-ENCODING-LABEL: mov32t:
-@ CHECK-ENCODING-NEXT: movw r0, #0
-@ CHECK-ENCODING-NEXT: movt r0, #0
-@ CHECK-ENCODING-NEXT: blx r0
+ movt r0, :upper16:target
+ blx r0
+
+@ CHECK-ENCODING-LABEL: mov32t
+@ CHECK-ENCODING-NEXT: movw r0, #0
+@ CHECK-ENCODING-NEXT: movt r0, #0
+@ CHECK-ENCODING-NEXT: blx r0
.thumb_func
addr32:
ldr r0, .Laddr32
bx r0
trap
-.Laddr32:
- .long target
-
-@ CHECK-ENCODING-LABEL: addr32:
-@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
-@ CHECK-ENCODING-NEXT: bx r0
-@ CHECK-ENCODING-NEXT: trap
+.Laddr32:
+ .long target
+
+@ CHECK-ENCODING-LABEL: addr32
+@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
+@ CHECK-ENCODING-NEXT: bx r0
+@ CHECK-ENCODING-NEXT: trap
@ CHECK-ENCODING-NEXT: movs r0, r0
@ CHECK-ENCODING-NEXT: movs r0, r0
@@ -62,13 +62,13 @@ addr32nb:
ldr r0, .Laddr32nb
bx r0
trap
-.Laddr32nb:
- .long target(imgrel)
-
-@ CHECK-ENCODING-LABEL: addr32nb:
-@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
-@ CHECK-ENCODING-NEXT: bx r0
-@ CHECK-ENCODING-NEXT: trap
+.Laddr32nb:
+ .long target(imgrel)
+
+@ CHECK-ENCODING-LABEL: addr32nb
+@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
+@ CHECK-ENCODING-NEXT: bx r0
+@ CHECK-ENCODING-NEXT: trap
@ CHECK-ENCODING-NEXT: movs r0, r0
@ CHECK-ENCODING-NEXT: movs r0, r0
@@ -77,13 +77,13 @@ secrel:
ldr r0, .Lsecrel
bx r0
trap
-.Lsecrel:
- .long target(secrel32)
-
-@ CHECK-ENCODING-LABEL: secrel:
-@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
-@ CHECK-ENCODING-NEXT: bx r0
-@ CHECK-ENCODING-NEXT: trap
+.Lsecrel:
+ .long target(secrel32)
+
+@ CHECK-ENCODING-LABEL: secrel
+@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
+@ CHECK-ENCODING-NEXT: bx r0
+@ CHECK-ENCODING-NEXT: trap
@ CHECK-ENCODING-NEXT: movs r0, r0
@ CHECK-ENCODING-NEXT: movs r0, r0
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