[AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ds_[read/write]_addtid_b32

See https://bugs.llvm.org/show_bug.cgi?id=37941

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D68787

llvm-svn: 374561

4 files changed, 58 insertions, 58 deletions

diff --git a/llvm/test/MC/AMDGPU/ds-gfx9.s b/llvm/test/MC/AMDGPU/ds-gfx9.s
index 7c67a3f7edd..810ccb018e8 100644
--- a/llvm/test/MC/AMDGPU/ds-gfx9.s
+++ b/llvm/test/MC/AMDGPU/ds-gfx9.s
@@ -33,10 +33,10 @@ ds_write_b16_d16_hi v8, v2
 // VI-ERR: error: instruction not supported on this GPU
 // GFX9: ds_write_b16_d16_hi v8, v2      ; encoding: [0x00,0x00,0xaa,0xd8,0x08,0x02,0x00,0x00]
 
-ds_write_addtid_b32 v8, v2
+ds_write_addtid_b32 v8
 // VI-ERR: error: instruction not supported on this GPU
-// GFX9: ds_write_addtid_b32 v8, v2      ; encoding: [0x00,0x00,0x3a,0xd8,0x08,0x02,0x00,0x00]
+// GFX9: ds_write_addtid_b32 v8 ; encoding: [0x00,0x00,0x3a,0xd8,0x00,0x08,0x00,0x00]
 
-ds_read_addtid_b32 v8, v2
+ds_read_addtid_b32 v8
 // VI-ERR: error: instruction not supported on this GPU
-// GFX9: ds_read_addtid_b32 v8, v2       ; encoding: [0x00,0x00,0x6c,0xd9,0x02,0x00,0x00,0x08]
+// GFX9: ds_read_addtid_b32 v8 ; encoding: [0x00,0x00,0x6c,0xd9,0x00,0x00,0x00,0x08]
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_all.s b/llvm/test/MC/AMDGPU/gfx10_asm_all.s
index 4916702dbcb..c358482eaa3 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_all.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_all.s
@@ -6538,47 +6538,47 @@ ds_read_u16_d16_hi v5, v1 offset:4
 ds_read_u16_d16_hi v5, v1 offset:65535 gds
 // GFX10: encoding: [0xff,0xff,0x9e,0xda,0x01,0x00,0x00,0x05]
 
-ds_write_addtid_b32 v5, v1 offset:65535
-// GFX10: encoding: [0xff,0xff,0xc0,0xda,0x05,0x01,0x00,0x00]
+ds_write_addtid_b32 v5 offset:65535
+// GFX10: encoding: [0xff,0xff,0xc0,0xda,0x00,0x05,0x00,0x00]
 
-ds_write_addtid_b32 v255, v1 offset:65535
-// GFX10: encoding: [0xff,0xff,0xc0,0xda,0xff,0x01,0x00,0x00]
+ds_write_addtid_b32 v255 offset:65535
+// GFX10: encoding: [0xff,0xff,0xc0,0xda,0x00,0xff,0x00,0x00]
 
-ds_write_addtid_b32 v5, v255 offset:65535
-// GFX10: encoding: [0xff,0xff,0xc0,0xda,0x05,0xff,0x00,0x00]
+ds_write_addtid_b32 v5 offset:65535
+// GFX10: encoding: [0xff,0xff,0xc0,0xda,0x00,0x05,0x00,0x00]
 
-ds_write_addtid_b32 v5, v1
-// GFX10: encoding: [0x00,0x00,0xc0,0xda,0x05,0x01,0x00,0x00]
+ds_write_addtid_b32 v5
+// GFX10: encoding: [0x00,0x00,0xc0,0xda,0x00,0x05,0x00,0x00]
 
-ds_write_addtid_b32 v5, v1 offset:0
-// GFX10: encoding: [0x00,0x00,0xc0,0xda,0x05,0x01,0x00,0x00]
+ds_write_addtid_b32 v5 offset:0
+// GFX10: encoding: [0x00,0x00,0xc0,0xda,0x00,0x05,0x00,0x00]
 
-ds_write_addtid_b32 v5, v1 offset:4
-// GFX10: encoding: [0x04,0x00,0xc0,0xda,0x05,0x01,0x00,0x00]
+ds_write_addtid_b32 v5 offset:4
+// GFX10: encoding: [0x04,0x00,0xc0,0xda,0x00,0x05,0x00,0x00]
 
-ds_write_addtid_b32 v5, v1 offset:65535 gds
-// GFX10: encoding: [0xff,0xff,0xc2,0xda,0x05,0x01,0x00,0x00]
+ds_write_addtid_b32 v5 offset:65535 gds
+// GFX10: encoding: [0xff,0xff,0xc2,0xda,0x00,0x05,0x00,0x00]
 
-ds_read_addtid_b32 v5, v1 offset:65535
-// GFX10: encoding: [0xff,0xff,0xc4,0xda,0x01,0x00,0x00,0x05]
+ds_read_addtid_b32 v5 offset:65535
+// GFX10: encoding: [0xff,0xff,0xc4,0xda,0x00,0x00,0x00,0x05]
 
-ds_read_addtid_b32 v255, v1 offset:65535
-// GFX10: encoding: [0xff,0xff,0xc4,0xda,0x01,0x00,0x00,0xff]
+ds_read_addtid_b32 v255 offset:65535
+// GFX10: encoding: [0xff,0xff,0xc4,0xda,0x00,0x00,0x00,0xff]
 
-ds_read_addtid_b32 v5, v255 offset:65535
-// GFX10: encoding: [0xff,0xff,0xc4,0xda,0xff,0x00,0x00,0x05]
+ds_read_addtid_b32 v5 offset:65535
+// GFX10: encoding: [0xff,0xff,0xc4,0xda,0x00,0x00,0x00,0x05]
 
-ds_read_addtid_b32 v5, v1
-// GFX10: encoding: [0x00,0x00,0xc4,0xda,0x01,0x00,0x00,0x05]
+ds_read_addtid_b32 v5
+// GFX10: encoding: [0x00,0x00,0xc4,0xda,0x00,0x00,0x00,0x05]
 
-ds_read_addtid_b32 v5, v1 offset:0
-// GFX10: encoding: [0x00,0x00,0xc4,0xda,0x01,0x00,0x00,0x05]
+ds_read_addtid_b32 v5 offset:0
+// GFX10: encoding: [0x00,0x00,0xc4,0xda,0x00,0x00,0x00,0x05]
 
-ds_read_addtid_b32 v5, v1 offset:4
-// GFX10: encoding: [0x04,0x00,0xc4,0xda,0x01,0x00,0x00,0x05]
+ds_read_addtid_b32 v5 offset:4
+// GFX10: encoding: [0x04,0x00,0xc4,0xda,0x00,0x00,0x00,0x05]
 
-ds_read_addtid_b32 v5, v1 offset:65535 gds
-// GFX10: encoding: [0xff,0xff,0xc6,0xda,0x01,0x00,0x00,0x05]
+ds_read_addtid_b32 v5 offset:65535 gds
+// GFX10: encoding: [0xff,0xff,0xc6,0xda,0x00,0x00,0x00,0x05]
 
 ds_permute_b32 v0, v1, v2
 // GFX10: encoding: [0x00,0x00,0xc8,0xda,0x01,0x02,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_err.s b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
index 4203fd51566..eff0cff4272 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_err.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
@@ -35,10 +35,10 @@ ds_read_u16_d16 v5, v1
 ds_read_u16_d16_hi v5, v1
 // GFX6-8: error: instruction not supported on this GPU
 
-ds_write_addtid_b32 v5, v1
+ds_write_addtid_b32 v5
 // GFX6-8: error: instruction not supported on this GPU
 
-ds_read_addtid_b32 v5, v1
+ds_read_addtid_b32 v5
 // GFX6-8: error: instruction not supported on this GPU
 
 // GFX8+.
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
index 1ad84351282..2efdedfd37c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
@@ -5762,23 +5762,23 @@
 # GFX10: ds_read2st64_b64 v[5:8], v255 offset0:127 offset1:255 ; encoding: [0x7f,0xff,0xe0,0xd9,0xff,0x00,0x00,0x05]
 0x7f,0xff,0xe0,0xd9,0xff,0x00,0x00,0x05
 
-# GFX10: ds_read_addtid_b32 v255, v1 offset:65535 ; encoding: [0xff,0xff,0xc4,0xda,0x01,0x00,0x00,0xff]
-0xff,0xff,0xc4,0xda,0x01,0x00,0x00,0xff
+# GFX10: ds_read_addtid_b32 v255 offset:65535 ; encoding: [0xff,0xff,0xc4,0xda,0x00,0x00,0x00,0xff]
+0xff 0xff 0xc4 0xda 0x00 0x00 0x00 0xff
 
-# GFX10: ds_read_addtid_b32 v5, v1       ; encoding: [0x00,0x00,0xc4,0xda,0x01,0x00,0x00,0x05]
-0x00,0x00,0xc4,0xda,0x01,0x00,0x00,0x05
+# GFX10: ds_read_addtid_b32 v5 ; encoding: [0x00,0x00,0xc4,0xda,0x00,0x00,0x00,0x05]
+0x00 0x00 0xc4 0xda 0x00 0x00 0x00 0x05
 
-# GFX10: ds_read_addtid_b32 v5, v1 offset:4 ; encoding: [0x04,0x00,0xc4,0xda,0x01,0x00,0x00,0x05]
-0x04,0x00,0xc4,0xda,0x01,0x00,0x00,0x05
+# GFX10: ds_read_addtid_b32 v5 offset:4 ; encoding: [0x04,0x00,0xc4,0xda,0x00,0x00,0x00,0x05]
+0x04 0x00 0xc4 0xda 0x00 0x00 0x00 0x05
 
-# GFX10: ds_read_addtid_b32 v5, v1 offset:65535 ; encoding: [0xff,0xff,0xc4,0xda,0x01,0x00,0x00,0x05]
-0xff,0xff,0xc4,0xda,0x01,0x00,0x00,0x05
+# GFX10: ds_read_addtid_b32 v5 offset:65535 ; encoding: [0xff,0xff,0xc4,0xda,0x00,0x00,0x00,0x05]
+0xff 0xff 0xc4 0xda 0x00 0x00 0x00 0x05
 
-# GFX10: ds_read_addtid_b32 v5, v1 offset:65535 gds ; encoding: [0xff,0xff,0xc6,0xda,0x01,0x00,0x00,0x05]
-0xff,0xff,0xc6,0xda,0x01,0x00,0x00,0x05
+# GFX10: ds_read_addtid_b32 v5 offset:65535 gds ; encoding: [0xff,0xff,0xc6,0xda,0x00,0x00,0x00,0x05]
+0xff 0xff 0xc6 0xda 0x00 0x00 0x00 0x05
 
-# GFX10: ds_read_addtid_b32 v5, v255 offset:65535 ; encoding: [0xff,0xff,0xc4,0xda,0xff,0x00,0x00,0x05]
-0xff,0xff,0xc4,0xda,0xff,0x00,0x00,0x05
+# GFX10: ds_read_addtid_b32 v5 offset:65535 ; encoding: [0xff,0xff,0xc4,0xda,0x00,0x00,0x00,0x05]
+0xff 0xff 0xc4 0xda 0x00 0x00 0x00 0x05
 
 # GFX10: ds_read_b128 v[252:255], v1 offset:65535 ; encoding: [0xff,0xff,0xfc,0xdb,0x01,0x00,0x00,0xfc]
 0xff,0xff,0xfc,0xdb,0x01,0x00,0x00,0xfc
@@ -7070,23 +7070,23 @@
 # GFX10: ds_write2st64_b64 v255, v[2:3], v[3:4] offset0:127 offset1:255 ; encoding: [0x7f,0xff,0x3c,0xd9,0xff,0x02,0x03,0x00]
 0x7f,0xff,0x3c,0xd9,0xff,0x02,0x03,0x00
 
-# GFX10: ds_write_addtid_b32 v255, v1 offset:65535 ; encoding: [0xff,0xff,0xc0,0xda,0xff,0x01,0x00,0x00]
-0xff,0xff,0xc0,0xda,0xff,0x01,0x00,0x00
+# GFX10: ds_write_addtid_b32 v255 offset:65535 ; encoding: [0xff,0xff,0xc0,0xda,0x00,0xff,0x00,0x00]
+0xff 0xff 0xc0 0xda 0x00 0xff 0x00 0x00
 
-# GFX10: ds_write_addtid_b32 v5, v1      ; encoding: [0x00,0x00,0xc0,0xda,0x05,0x01,0x00,0x00]
-0x00,0x00,0xc0,0xda,0x05,0x01,0x00,0x00
+# GFX10: ds_write_addtid_b32 v5 ; encoding: [0x00,0x00,0xc0,0xda,0x00,0x05,0x00,0x00]
+0x00 0x00 0xc0 0xda 0x00 0x05 0x00 0x00
 
-# GFX10: ds_write_addtid_b32 v5, v1 offset:4 ; encoding: [0x04,0x00,0xc0,0xda,0x05,0x01,0x00,0x00]
-0x04,0x00,0xc0,0xda,0x05,0x01,0x00,0x00
+# GFX10: ds_write_addtid_b32 v5 offset:4 ; encoding: [0x04,0x00,0xc0,0xda,0x00,0x05,0x00,0x00]
+0x04 0x00 0xc0 0xda 0x00 0x05 0x00 0x00
 
-# GFX10: ds_write_addtid_b32 v5, v1 offset:65535 ; encoding: [0xff,0xff,0xc0,0xda,0x05,0x01,0x00,0x00]
-0xff,0xff,0xc0,0xda,0x05,0x01,0x00,0x00
+# GFX10: ds_write_addtid_b32 v5 offset:65535 ; encoding: [0xff,0xff,0xc0,0xda,0x00,0x05,0x00,0x00]
+0xff 0xff 0xc0 0xda 0x00 0x05 0x00 0x00
 
-# GFX10: ds_write_addtid_b32 v5, v1 offset:65535 gds ; encoding: [0xff,0xff,0xc2,0xda,0x05,0x01,0x00,0x00]
-0xff,0xff,0xc2,0xda,0x05,0x01,0x00,0x00
+# GFX10: ds_write_addtid_b32 v5 offset:65535 gds ; encoding: [0xff,0xff,0xc2,0xda,0x00,0x05,0x00,0x00]
+0xff 0xff 0xc2 0xda 0x00 0x05 0x00 0x00
 
-# GFX10: ds_write_addtid_b32 v5, v255 offset:65535 ; encoding: [0xff,0xff,0xc0,0xda,0x05,0xff,0x00,0x00]
-0xff,0xff,0xc0,0xda,0x05,0xff,0x00,0x00
+# GFX10: ds_write_addtid_b32 v5 offset:65535 ; encoding: [0xff,0xff,0xc0,0xda,0x00,0x05,0x00,0x00]
+0xff 0xff 0xc0 0xda 0x00 0x05 0x00 0x00
 
 # GFX10: ds_write_b128 v1, v[252:255] offset:65535 ; encoding: [0xff,0xff,0x7c,0xdb,0x01,0xfc,0x00,0x00]
 0xff,0xff,0x7c,0xdb,0x01,0xfc,0x00,0x00