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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-02-10 15:33:13 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-02-10 15:33:13 +0000 |
| commit | a72fad980cb18a09dbd6ea95d3b5684d3280894a (patch) | |
| tree | 219cb68ed6c0c45535e018f095ebb3082fea6117 /llvm/test/MC | |
| parent | be99157127994212eba77f268d508526fed177fd (diff) | |
| download | bcm5719-llvm-a72fad980cb18a09dbd6ea95d3b5684d3280894a.tar.gz bcm5719-llvm-a72fad980cb18a09dbd6ea95d3b5684d3280894a.zip | |
[Hexagon] Replace instruction definitions with auto-generated ones
llvm-svn: 294753
Diffstat (limited to 'llvm/test/MC')
40 files changed, 1137 insertions, 1140 deletions
diff --git a/llvm/test/MC/Disassembler/Hexagon/alu32_alu.txt b/llvm/test/MC/Disassembler/Hexagon/alu32_alu.txt index 26b320ecde0..e75a9982abd 100644 --- a/llvm/test/MC/Disassembler/Hexagon/alu32_alu.txt +++ b/llvm/test/MC/Disassembler/Hexagon/alu32_alu.txt @@ -3,27 +3,27 @@ # Add 0xf1 0xc3 0x15 0xb0 -# CHECK: r17 = add(r21, #31) +# CHECK: r17 = add(r21,#31) 0x11 0xdf 0x15 0xf3 -# CHECK: r17 = add(r21, r31) +# CHECK: r17 = add(r21,r31) 0x11 0xdf 0x55 0xf6 -# CHECK: r17 = add(r21, r31):sat +# CHECK: r17 = add(r21,r31):sat # And 0xf1 0xc3 0x15 0x76 -# CHECK: r17 = and(r21, #31) +# CHECK: r17 = and(r21,#31) 0xf1 0xc3 0x95 0x76 -# CHECK: r17 = or(r21, #31) +# CHECK: r17 = or(r21,#31) 0x11 0xdf 0x15 0xf1 -# CHECK: r17 = and(r21, r31) +# CHECK: r17 = and(r21,r31) 0x11 0xdf 0x35 0xf1 -# CHECK: r17 = or(r21, r31) +# CHECK: r17 = or(r21,r31) 0x11 0xdf 0x75 0xf1 -# CHECK: r17 = xor(r21, r31) +# CHECK: r17 = xor(r21,r31) 0x11 0xd5 0x9f 0xf1 -# CHECK: r17 = and(r21, ~r31) +# CHECK: r17 = and(r21,~r31) 0x11 0xd5 0xbf 0xf1 -# CHECK: r17 = or(r21, ~r31) +# CHECK: r17 = or(r21,~r31) # Nop 0x00 0xc0 0x00 0x7f @@ -31,11 +31,11 @@ # Subtract 0xb1 0xc2 0x5f 0x76 -# CHECK: r17 = sub(#21, r31) +# CHECK: r17 = sub(#21,r31) 0x11 0xdf 0x35 0xf3 -# CHECK: r17 = sub(r31, r21) +# CHECK: r17 = sub(r31,r21) 0x11 0xdf 0xd5 0xf6 -# CHECK: r17 = sub(r31, r21):sat +# CHECK: r17 = sub(r31,r21):sat # Sign extend 0x11 0xc0 0xbf 0x70 @@ -57,27 +57,27 @@ # Vector add halfwords 0x11 0xdf 0x15 0xf6 -# CHECK: r17 = vaddh(r21, r31) +# CHECK: r17 = vaddh(r21,r31) 0x11 0xdf 0x35 0xf6 -# CHECK: r17 = vaddh(r21, r31):sat +# CHECK: r17 = vaddh(r21,r31):sat 0x11 0xdf 0x75 0xf6 -# CHECK: r17 = vadduh(r21, r31):sat +# CHECK: r17 = vadduh(r21,r31):sat # Vector average halfwords 0x11 0xdf 0x15 0xf7 -# CHECK: r17 = vavgh(r21, r31) +# CHECK: r17 = vavgh(r21,r31) 0x11 0xdf 0x35 0xf7 -# CHECK: r17 = vavgh(r21, r31):rnd +# CHECK: r17 = vavgh(r21,r31):rnd 0x11 0xdf 0x75 0xf7 -# CHECK: r17 = vnavgh(r31, r21) +# CHECK: r17 = vnavgh(r31,r21) # Vector subtract halfwords 0x11 0xdf 0x95 0xf6 -# CHECK: r17 = vsubh(r31, r21) +# CHECK: r17 = vsubh(r31,r21) 0x11 0xdf 0xb5 0xf6 -# CHECK: r17 = vsubh(r31, r21):sat +# CHECK: r17 = vsubh(r31,r21):sat 0x11 0xdf 0xf5 0xf6 -# CHECK: r17 = vsubuh(r31, r21):sat +# CHECK: r17 = vsubuh(r31,r21):sat # Zero extend 0x11 0xc0 0xd5 0x70 diff --git a/llvm/test/MC/Disassembler/Hexagon/alu32_perm.txt b/llvm/test/MC/Disassembler/Hexagon/alu32_perm.txt index a2953506c59..c4b1ab97963 100644 --- a/llvm/test/MC/Disassembler/Hexagon/alu32_perm.txt +++ b/llvm/test/MC/Disassembler/Hexagon/alu32_perm.txt @@ -3,31 +3,31 @@ # Combine words in to doublewords 0x11 0xdf 0x95 0xf3 -# CHECK: r17 = combine(r31.h, r21.h) +# CHECK: r17 = combine(r31.h,r21.h) 0x11 0xdf 0xb5 0xf3 -# CHECK: r17 = combine(r31.h, r21.l) +# CHECK: r17 = combine(r31.h,r21.l) 0x11 0xdf 0xd5 0xf3 -# CHECK: r17 = combine(r31.l, r21.h) +# CHECK: r17 = combine(r31.l,r21.h) 0x11 0xdf 0xf5 0xf3 -# CHECK: r17 = combine(r31.l, r21.l) +# CHECK: r17 = combine(r31.l,r21.l) 0xb0 0xe2 0x0f 0x7c -# CHECK: r17:16 = combine(#21, #31) +# CHECK: r17:16 = combine(#21,#31) 0xb0 0xe2 0x3f 0x73 -# CHECK: r17:16 = combine(#21, r31) +# CHECK: r17:16 = combine(#21,r31) 0xf0 0xe3 0x15 0x73 -# CHECK: r17:16 = combine(r21, #31) +# CHECK: r17:16 = combine(r21,#31) 0x10 0xdf 0x15 0xf5 -# CHECK: r17:16 = combine(r21, r31) +# CHECK: r17:16 = combine(r21,r31) # Mux 0xf1 0xc3 0x75 0x73 -# CHECK: r17 = mux(p3, r21, #31) +# CHECK: r17 = mux(p3,r21,#31) 0xb1 0xc2 0xff 0x73 -# CHECK: r17 = mux(p3, #21, r31) +# CHECK: r17 = mux(p3,#21,r31) 0xb1 0xe2 0x8f 0x7b -# CHECK: r17 = mux(p3, #21, #31) +# CHECK: r17 = mux(p3,#21,#31) 0x71 0xdf 0x15 0xf4 -# CHECK: r17 = mux(p3, r21, r31) +# CHECK: r17 = mux(p3,r21,r31) # Shift word by 16 0x11 0xc0 0x15 0x70 @@ -37,4 +37,4 @@ # Pack high and low halfwords 0x10 0xdf 0x95 0xf5 -# CHECK: r17:16 = packhl(r21, r31) +# CHECK: r17:16 = packhl(r21,r31) diff --git a/llvm/test/MC/Disassembler/Hexagon/alu32_pred.txt b/llvm/test/MC/Disassembler/Hexagon/alu32_pred.txt index 084b39d8cbf..b9e111364e6 100644 --- a/llvm/test/MC/Disassembler/Hexagon/alu32_pred.txt +++ b/llvm/test/MC/Disassembler/Hexagon/alu32_pred.txt @@ -3,25 +3,25 @@ # Conditional add 0xf1 0xc3 0x75 0x74 -# CHECK: if (p3) r17 = add(r21, #31) +# CHECK: if (p3) r17 = add(r21,#31) 0x03 0x40 0x45 0x85 0xf1 0xe3 0x75 0x74 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = add(r21, #31) +# CHECK-NEXT: if (p3.new) r17 = add(r21,#31) 0xf1 0xc3 0xf5 0x74 -# CHECK: if (!p3) r17 = add(r21, #31) +# CHECK: if (!p3) r17 = add(r21,#31) 0x03 0x40 0x45 0x85 0xf1 0xe3 0xf5 0x74 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = add(r21, #31) +# CHECK-NEXT: if (!p3.new) r17 = add(r21,#31) 0x71 0xdf 0x15 0xfb -# CHECK: if (p3) r17 = add(r21, r31) +# CHECK: if (p3) r17 = add(r21,r31) 0x03 0x40 0x45 0x85 0x71 0xff 0x15 0xfb # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = add(r21, r31) +# CHECK-NEXT: if (p3.new) r17 = add(r21,r31) 0xf1 0xdf 0x15 0xfb -# CHECK: if (!p3) r17 = add(r21, r31) +# CHECK: if (!p3) r17 = add(r21,r31) 0x03 0x40 0x45 0x85 0xf1 0xff 0x15 0xfb # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = add(r21, r31) +# CHECK-NEXT: if (!p3.new) r17 = add(r21,r31) # Conditional shift halfword 0x11 0xe3 0x15 0x70 @@ -47,59 +47,59 @@ # Conditional combine 0x70 0xdf 0x15 0xfd -# CHECK: if (p3) r17:16 = combine(r21, r31) +# CHECK: if (p3) r17:16 = combine(r21,r31) 0xf0 0xdf 0x15 0xfd -# CHECK: if (!p3) r17:16 = combine(r21, r31) +# CHECK: if (!p3) r17:16 = combine(r21,r31) 0x03 0x40 0x45 0x85 0x70 0xff 0x15 0xfd # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17:16 = combine(r21, r31) +# CHECK-NEXT: if (p3.new) r17:16 = combine(r21,r31) 0x03 0x40 0x45 0x85 0xf0 0xff 0x15 0xfd # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17:16 = combine(r21, r31) +# CHECK-NEXT: if (!p3.new) r17:16 = combine(r21,r31) # Conditional logical operations 0x71 0xdf 0x15 0xf9 -# CHECK: if (p3) r17 = and(r21, r31) +# CHECK: if (p3) r17 = and(r21,r31) 0xf1 0xdf 0x15 0xf9 -# CHECK: if (!p3) r17 = and(r21, r31) +# CHECK: if (!p3) r17 = and(r21,r31) 0x03 0x40 0x45 0x85 0x71 0xff 0x15 0xf9 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = and(r21, r31) +# CHECK-NEXT: if (p3.new) r17 = and(r21,r31) 0x03 0x40 0x45 0x85 0xf1 0xff 0x15 0xf9 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = and(r21, r31) +# CHECK-NEXT: if (!p3.new) r17 = and(r21,r31) 0x71 0xdf 0x35 0xf9 -# CHECK: if (p3) r17 = or(r21, r31) +# CHECK: if (p3) r17 = or(r21,r31) 0xf1 0xdf 0x35 0xf9 -# CHECK: if (!p3) r17 = or(r21, r31) +# CHECK: if (!p3) r17 = or(r21,r31) 0x03 0x40 0x45 0x85 0x71 0xff 0x35 0xf9 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = or(r21, r31) +# CHECK-NEXT: if (p3.new) r17 = or(r21,r31) 0x03 0x40 0x45 0x85 0xf1 0xff 0x35 0xf9 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = or(r21, r31) +# CHECK-NEXT: if (!p3.new) r17 = or(r21,r31) 0x71 0xdf 0x75 0xf9 -# CHECK: if (p3) r17 = xor(r21, r31) +# CHECK: if (p3) r17 = xor(r21,r31) 0xf1 0xdf 0x75 0xf9 -# CHECK: if (!p3) r17 = xor(r21, r31) +# CHECK: if (!p3) r17 = xor(r21,r31) 0x03 0x40 0x45 0x85 0x71 0xff 0x75 0xf9 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = xor(r21, r31) +# CHECK-NEXT: if (p3.new) r17 = xor(r21,r31) 0x03 0x40 0x45 0x85 0xf1 0xff 0x75 0xf9 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = xor(r21, r31) +# CHECK-NEXT: if (!p3.new) r17 = xor(r21,r31) # Conditional subtract 0x71 0xdf 0x35 0xfb -# CHECK: if (p3) r17 = sub(r31, r21) +# CHECK: if (p3) r17 = sub(r31,r21) 0xf1 0xdf 0x35 0xfb -# CHECK: if (!p3) r17 = sub(r31, r21) +# CHECK: if (!p3) r17 = sub(r31,r21) 0x03 0x40 0x45 0x85 0x71 0xff 0x35 0xfb # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = sub(r31, r21) +# CHECK-NEXT: if (p3.new) r17 = sub(r31,r21) 0x03 0x40 0x45 0x85 0xf1 0xff 0x35 0xfb # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = sub(r31, r21) +# CHECK-NEXT: if (!p3.new) r17 = sub(r31,r21) # Conditional sign extend 0x11 0xe3 0xb5 0x70 @@ -159,36 +159,36 @@ # Compare 0xe3 0xc3 0x15 0x75 -# CHECK: p3 = cmp.eq(r21, #31) +# CHECK: p3 = cmp.eq(r21,#31) 0xf3 0xc3 0x15 0x75 -# CHECK: p3 = !cmp.eq(r21, #31) +# CHECK: p3 = !cmp.eq(r21,#31) 0xe3 0xc3 0x55 0x75 -# CHECK: p3 = cmp.gt(r21, #31) +# CHECK: p3 = cmp.gt(r21,#31) 0xf3 0xc3 0x55 0x75 -# CHECK: p3 = !cmp.gt(r21, #31) +# CHECK: p3 = !cmp.gt(r21,#31) 0xe3 0xc3 0x95 0x75 -# CHECK: p3 = cmp.gtu(r21, #31) +# CHECK: p3 = cmp.gtu(r21,#31) 0xf3 0xc3 0x95 0x75 -# CHECK: p3 = !cmp.gtu(r21, #31) +# CHECK: p3 = !cmp.gtu(r21,#31) 0x03 0xdf 0x15 0xf2 -# CHECK: p3 = cmp.eq(r21, r31) +# CHECK: p3 = cmp.eq(r21,r31) 0x13 0xdf 0x15 0xf2 -# CHECK: p3 = !cmp.eq(r21, r31) +# CHECK: p3 = !cmp.eq(r21,r31) 0x03 0xdf 0x55 0xf2 -# CHECK: p3 = cmp.gt(r21, r31) +# CHECK: p3 = cmp.gt(r21,r31) 0x13 0xdf 0x55 0xf2 -# CHECK: p3 = !cmp.gt(r21, r31) +# CHECK: p3 = !cmp.gt(r21,r31) 0x03 0xdf 0x75 0xf2 -# CHECK: p3 = cmp.gtu(r21, r31) +# CHECK: p3 = cmp.gtu(r21,r31) 0x13 0xdf 0x75 0xf2 -# CHECK: p3 = !cmp.gtu(r21, r31) +# CHECK: p3 = !cmp.gtu(r21,r31) # Compare to general register 0xf1 0xe3 0x55 0x73 -# CHECK: r17 = cmp.eq(r21, #31) +# CHECK: r17 = cmp.eq(r21,#31) 0xf1 0xe3 0x75 0x73 -# CHECK: r17 = !cmp.eq(r21, #31) +# CHECK: r17 = !cmp.eq(r21,#31) 0x11 0xdf 0x55 0xf3 -# CHECK: r17 = cmp.eq(r21, r31) +# CHECK: r17 = cmp.eq(r21,r31) 0x11 0xdf 0x75 0xf3 -# CHECK: r17 = !cmp.eq(r21, r31) +# CHECK: r17 = !cmp.eq(r21,r31) diff --git a/llvm/test/MC/Disassembler/Hexagon/cr.txt b/llvm/test/MC/Disassembler/Hexagon/cr.txt index 6cf2b5fda39..8e505299d96 100644 --- a/llvm/test/MC/Disassembler/Hexagon/cr.txt +++ b/llvm/test/MC/Disassembler/Hexagon/cr.txt @@ -3,9 +3,9 @@ # Corner detection acceleration 0x93 0xe1 0x12 0x6b -# CHECK: p3 = !fastcorner9(p2, p1) +# CHECK: p3 = !fastcorner9(p2,p1) 0x91 0xe3 0x02 0x6b -# CHECK: p1 = fastcorner9(p2, p3) +# CHECK: p1 = fastcorner9(p2,p3) # Logical reductions on predicates 0x01 0xc0 0x82 0x6b @@ -25,7 +25,7 @@ # Add to PC 0x91 0xca 0x49 0x6a -# CHECK: r17 = add(pc, #21) +# CHECK: r17 = add(pc,#21) # Pipelined loop instructions 0x08 0xc4 0xb5 0x60 @@ -43,33 +43,33 @@ # Logical operations on predicates 0x01 0xc3 0x02 0x6b -# CHECK: p1 = and(p3, p2) +# CHECK: p1 = and(p3,p2) 0xc1 0xc3 0x12 0x6b -# CHECK: p1 = and(p2, and(p3, p3)) +# CHECK: p1 = and(p2,and(p3,p3)) 0x01 0xc3 0x22 0x6b -# CHECK: p1 = or(p3, p2) +# CHECK: p1 = or(p3,p2) 0xc1 0xc3 0x32 0x6b -# CHECK: p1 = and(p2, or(p3, p3)) +# CHECK: p1 = and(p2,or(p3,p3)) 0x01 0xc3 0x42 0x6b -# CHECK: p1 = xor(p2, p3) +# CHECK: p1 = xor(p2,p3) 0xc1 0xc3 0x52 0x6b -# CHECK: p1 = or(p2, and(p3, p3)) +# CHECK: p1 = or(p2,and(p3,p3)) 0x01 0xc2 0x63 0x6b -# CHECK: p1 = and(p2, !p3) +# CHECK: p1 = and(p2,!p3) 0xc1 0xc3 0x72 0x6b -# CHECK: p1 = or(p2, or(p3, p3)) +# CHECK: p1 = or(p2,or(p3,p3)) 0xc1 0xc3 0x92 0x6b -# CHECK: p1 = and(p2, and(p3, !p3)) +# CHECK: p1 = and(p2,and(p3,!p3)) 0xc1 0xc3 0xb2 0x6b -# CHECK: p1 = and(p2, or(p3, !p3)) +# CHECK: p1 = and(p2,or(p3,!p3)) 0x01 0xc0 0xc2 0x6b # CHECK: p1 = not(p2) 0xc1 0xc3 0xd2 0x6b -# CHECK: p1 = or(p2, and(p3, !p3)) +# CHECK: p1 = or(p2,and(p3,!p3)) 0x01 0xc2 0xe3 0x6b -# CHECK: p1 = or(p2, !p3) +# CHECK: p1 = or(p2,!p3) 0xc1 0xc3 0xf2 0x6b -# CHECK: p1 = or(p2, or(p3, !p3)) +# CHECK: p1 = or(p2,or(p3,!p3)) # User control register transfer 0x0d 0xc0 0x35 0x62 diff --git a/llvm/test/MC/Disassembler/Hexagon/j.txt b/llvm/test/MC/Disassembler/Hexagon/j.txt index 661670e2a61..c3d16386393 100644 --- a/llvm/test/MC/Disassembler/Hexagon/j.txt +++ b/llvm/test/MC/Disassembler/Hexagon/j.txt @@ -15,145 +15,145 @@ 0x00 0xc1 0x89 0x11 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:nt 0x00 0xc3 0x89 0x11 -# CHECK: p0 = tstbit(r17, #0); if (p0.new) jump:nt +# CHECK: p0 = tstbit(r17,#0); if (p0.new) jump:nt 0x00 0xe0 0x89 0x11 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:t 0x00 0xe1 0x89 0x11 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:t 0x00 0xe3 0x89 0x11 -# CHECK: p0 = tstbit(r17, #0); if (p0.new) jump:t +# CHECK: p0 = tstbit(r17,#0); if (p0.new) jump:t 0x00 0xc0 0xc9 0x11 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:nt 0x00 0xc1 0xc9 0x11 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:nt 0x00 0xc3 0xc9 0x11 -# CHECK: p0 = tstbit(r17, #0); if (!p0.new) jump:nt +# CHECK: p0 = tstbit(r17,#0); if (!p0.new) jump:nt 0x00 0xe0 0xc9 0x11 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:t 0x00 0xe1 0xc9 0x11 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:t 0x00 0xe3 0xc9 0x11 -# CHECK: p0 = tstbit(r17, #0); if (!p0.new) jump:t +# CHECK: p0 = tstbit(r17,#0); if (!p0.new) jump:t 0x00 0xd5 0x09 0x10 -# CHECK: p0 = cmp.eq(r17, #21); if (p0.new) jump:nt +# CHECK: p0 = cmp.eq(r17,#21); if (p0.new) jump:nt 0x00 0xf5 0x09 0x10 -# CHECK: p0 = cmp.eq(r17, #21); if (p0.new) jump:t +# CHECK: p0 = cmp.eq(r17,#21); if (p0.new) jump:t 0x00 0xd5 0x49 0x10 -# CHECK: p0 = cmp.eq(r17, #21); if (!p0.new) jump:nt +# CHECK: p0 = cmp.eq(r17,#21); if (!p0.new) jump:nt 0x00 0xf5 0x49 0x10 -# CHECK: p0 = cmp.eq(r17, #21); if (!p0.new) jump:t +# CHECK: p0 = cmp.eq(r17,#21); if (!p0.new) jump:t 0x00 0xd5 0x89 0x10 -# CHECK: p0 = cmp.gt(r17, #21); if (p0.new) jump:nt +# CHECK: p0 = cmp.gt(r17,#21); if (p0.new) jump:nt 0x00 0xf5 0x89 0x10 -# CHECK: p0 = cmp.gt(r17, #21); if (p0.new) jump:t +# CHECK: p0 = cmp.gt(r17,#21); if (p0.new) jump:t 0x00 0xd5 0xc9 0x10 -# CHECK: p0 = cmp.gt(r17, #21); if (!p0.new) jump:nt +# CHECK: p0 = cmp.gt(r17,#21); if (!p0.new) jump:nt 0x00 0xf5 0xc9 0x10 -# CHECK: p0 = cmp.gt(r17, #21); if (!p0.new) jump:t +# CHECK: p0 = cmp.gt(r17,#21); if (!p0.new) jump:t 0x00 0xd5 0x09 0x11 -# CHECK: p0 = cmp.gtu(r17, #21); if (p0.new) jump:nt +# CHECK: p0 = cmp.gtu(r17,#21); if (p0.new) jump:nt 0x00 0xf5 0x09 0x11 -# CHECK: p0 = cmp.gtu(r17, #21); if (p0.new) jump:t +# CHECK: p0 = cmp.gtu(r17,#21); if (p0.new) jump:t 0x00 0xd5 0x49 0x11 -# CHECK: p0 = cmp.gtu(r17, #21); if (!p0.new) jump:nt +# CHECK: p0 = cmp.gtu(r17,#21); if (!p0.new) jump:nt 0x00 0xf5 0x49 0x11 -# CHECK: p0 = cmp.gtu(r17, #21); if (!p0.new) jump:t +# CHECK: p0 = cmp.gtu(r17,#21); if (!p0.new) jump:t 0x00 0xc0 0x89 0x13 # CHECK: p1 = cmp.eq(r17,#-1); if (p1.new) jump:nt 0x00 0xc1 0x89 0x13 # CHECK: p1 = cmp.gt(r17,#-1); if (p1.new) jump:nt 0x00 0xc3 0x89 0x13 -# CHECK: p1 = tstbit(r17, #0); if (p1.new) jump:nt +# CHECK: p1 = tstbit(r17,#0); if (p1.new) jump:nt 0x00 0xe0 0x89 0x13 # CHECK: p1 = cmp.eq(r17,#-1); if (p1.new) jump:t 0x00 0xe1 0x89 0x13 # CHECK: p1 = cmp.gt(r17,#-1); if (p1.new) jump:t 0x00 0xe3 0x89 0x13 -# CHECK: p1 = tstbit(r17, #0); if (p1.new) jump:t +# CHECK: p1 = tstbit(r17,#0); if (p1.new) jump:t 0x00 0xc0 0xc9 0x13 # CHECK: p1 = cmp.eq(r17,#-1); if (!p1.new) jump:nt 0x00 0xc1 0xc9 0x13 # CHECK: p1 = cmp.gt(r17,#-1); if (!p1.new) jump:nt 0x00 0xc3 0xc9 0x13 -# CHECK: p1 = tstbit(r17, #0); if (!p1.new) jump:nt +# CHECK: p1 = tstbit(r17,#0); if (!p1.new) jump:nt 0x00 0xe0 0xc9 0x13 # CHECK: p1 = cmp.eq(r17,#-1); if (!p1.new) jump:t 0x00 0xe1 0xc9 0x13 # CHECK: p1 = cmp.gt(r17,#-1); if (!p1.new) jump:t 0x00 0xe3 0xc9 0x13 -# CHECK: p1 = tstbit(r17, #0); if (!p1.new) jump:t +# CHECK: p1 = tstbit(r17,#0); if (!p1.new) jump:t 0x00 0xd5 0x09 0x12 -# CHECK: p1 = cmp.eq(r17, #21); if (p1.new) jump:nt +# CHECK: p1 = cmp.eq(r17,#21); if (p1.new) jump:nt 0x00 0xf5 0x09 0x12 -# CHECK: p1 = cmp.eq(r17, #21); if (p1.new) jump:t +# CHECK: p1 = cmp.eq(r17,#21); if (p1.new) jump:t 0x00 0xd5 0x49 0x12 -# CHECK: p1 = cmp.eq(r17, #21); if (!p1.new) jump:nt +# CHECK: p1 = cmp.eq(r17,#21); if (!p1.new) jump:nt 0x00 0xf5 0x49 0x12 -# CHECK: p1 = cmp.eq(r17, #21); if (!p1.new) jump:t +# CHECK: p1 = cmp.eq(r17,#21); if (!p1.new) jump:t 0x00 0xd5 0x89 0x12 -# CHECK: p1 = cmp.gt(r17, #21); if (p1.new) jump:nt +# CHECK: p1 = cmp.gt(r17,#21); if (p1.new) jump:nt 0x00 0xf5 0x89 0x12 -# CHECK: p1 = cmp.gt(r17, #21); if (p1.new) jump:t +# CHECK: p1 = cmp.gt(r17,#21); if (p1.new) jump:t 0x00 0xd5 0xc9 0x12 -# CHECK: p1 = cmp.gt(r17, #21); if (!p1.new) jump:nt +# CHECK: p1 = cmp.gt(r17,#21); if (!p1.new) jump:nt 0x00 0xf5 0xc9 0x12 -# CHECK: p1 = cmp.gt(r17, #21); if (!p1.new) jump:t +# CHECK: p1 = cmp.gt(r17,#21); if (!p1.new) jump:t 0x00 0xd5 0x09 0x13 -# CHECK: p1 = cmp.gtu(r17, #21); if (p1.new) jump:nt +# CHECK: p1 = cmp.gtu(r17,#21); if (p1.new) jump:nt 0x00 0xf5 0x09 0x13 -# CHECK: p1 = cmp.gtu(r17, #21); if (p1.new) jump:t +# CHECK: p1 = cmp.gtu(r17,#21); if (p1.new) jump:t 0x00 0xd5 0x49 0x13 -# CHECK: p1 = cmp.gtu(r17, #21); if (!p1.new) jump:nt +# CHECK: p1 = cmp.gtu(r17,#21); if (!p1.new) jump:nt 0x00 0xf5 0x49 0x13 -# CHECK: p1 = cmp.gtu(r17, #21); if (!p1.new) jump:t +# CHECK: p1 = cmp.gtu(r17,#21); if (!p1.new) jump:t 0x00 0xcd 0x09 0x14 -# CHECK: p0 = cmp.eq(r17, r21); if (p0.new) jump:nt +# CHECK: p0 = cmp.eq(r17,r21); if (p0.new) jump:nt 0x00 0xdd 0x09 0x14 -# CHECK: p1 = cmp.eq(r17, r21); if (p1.new) jump:nt +# CHECK: p1 = cmp.eq(r17,r21); if (p1.new) jump:nt 0x00 0xed 0x09 0x14 -# CHECK: p0 = cmp.eq(r17, r21); if (p0.new) jump:t +# CHECK: p0 = cmp.eq(r17,r21); if (p0.new) jump:t 0x00 0xfd 0x09 0x14 -# CHECK: p1 = cmp.eq(r17, r21); if (p1.new) jump:t +# CHECK: p1 = cmp.eq(r17,r21); if (p1.new) jump:t 0x00 0xcd 0x49 0x14 -# CHECK: p0 = cmp.eq(r17, r21); if (!p0.new) jump:nt +# CHECK: p0 = cmp.eq(r17,r21); if (!p0.new) jump:nt 0x00 0xdd 0x49 0x14 -# CHECK: p1 = cmp.eq(r17, r21); if (!p1.new) jump:nt +# CHECK: p1 = cmp.eq(r17,r21); if (!p1.new) jump:nt 0x00 0xed 0x49 0x14 -# CHECK: p0 = cmp.eq(r17, r21); if (!p0.new) jump:t +# CHECK: p0 = cmp.eq(r17,r21); if (!p0.new) jump:t 0x00 0xfd 0x49 0x14 -# CHECK: p1 = cmp.eq(r17, r21); if (!p1.new) jump:t +# CHECK: p1 = cmp.eq(r17,r21); if (!p1.new) jump:t 0x00 0xcd 0x89 0x14 -# CHECK: p0 = cmp.gt(r17, r21); if (p0.new) jump:nt +# CHECK: p0 = cmp.gt(r17,r21); if (p0.new) jump:nt 0x00 0xdd 0x89 0x14 -# CHECK: p1 = cmp.gt(r17, r21); if (p1.new) jump:nt +# CHECK: p1 = cmp.gt(r17,r21); if (p1.new) jump:nt 0x00 0xed 0x89 0x14 -# CHECK: p0 = cmp.gt(r17, r21); if (p0.new) jump:t +# CHECK: p0 = cmp.gt(r17,r21); if (p0.new) jump:t 0x00 0xfd 0x89 0x14 -# CHECK: p1 = cmp.gt(r17, r21); if (p1.new) jump:t +# CHECK: p1 = cmp.gt(r17,r21); if (p1.new) jump:t 0x00 0xcd 0xc9 0x14 -# CHECK: p0 = cmp.gt(r17, r21); if (!p0.new) jump:nt +# CHECK: p0 = cmp.gt(r17,r21); if (!p0.new) jump:nt 0x00 0xdd 0xc9 0x14 -# CHECK: p1 = cmp.gt(r17, r21); if (!p1.new) jump:nt +# CHECK: p1 = cmp.gt(r17,r21); if (!p1.new) jump:nt 0x00 0xed 0xc9 0x14 -# CHECK: p0 = cmp.gt(r17, r21); if (!p0.new) jump:t +# CHECK: p0 = cmp.gt(r17,r21); if (!p0.new) jump:t 0x00 0xfd 0xc9 0x14 -# CHECK: p1 = cmp.gt(r17, r21); if (!p1.new) jump:t +# CHECK: p1 = cmp.gt(r17,r21); if (!p1.new) jump:t 0x00 0xcd 0x09 0x15 -# CHECK: p0 = cmp.gtu(r17, r21); if (p0.new) jump:nt +# CHECK: p0 = cmp.gtu(r17,r21); if (p0.new) jump:nt 0x00 0xdd 0x09 0x15 -# CHECK: p1 = cmp.gtu(r17, r21); if (p1.new) jump:nt +# CHECK: p1 = cmp.gtu(r17,r21); if (p1.new) jump:nt 0x00 0xed 0x09 0x15 -# CHECK: p0 = cmp.gtu(r17, r21); if (p0.new) jump:t +# CHECK: p0 = cmp.gtu(r17,r21); if (p0.new) jump:t 0x00 0xfd 0x09 0x15 -# CHECK: p1 = cmp.gtu(r17, r21); if (p1.new) jump:t +# CHECK: p1 = cmp.gtu(r17,r21); if (p1.new) jump:t 0x00 0xcd 0x49 0x15 -# CHECK: p0 = cmp.gtu(r17, r21); if (!p0.new) jump:nt +# CHECK: p0 = cmp.gtu(r17,r21); if (!p0.new) jump:nt 0x00 0xdd 0x49 0x15 -# CHECK: p1 = cmp.gtu(r17, r21); if (!p1.new) jump:nt +# CHECK: p1 = cmp.gtu(r17,r21); if (!p1.new) jump:nt 0x00 0xed 0x49 0x15 -# CHECK: p0 = cmp.gtu(r17, r21); if (!p0.new) jump:t +# CHECK: p0 = cmp.gtu(r17,r21); if (!p0.new) jump:t 0x00 0xfd 0x49 0x15 -# CHECK: p1 = cmp.gtu(r17, r21); if (!p1.new) jump:t +# CHECK: p1 = cmp.gtu(r17,r21); if (!p1.new) jump:t # Jump to address 0x22 0xc0 0x00 0x58 diff --git a/llvm/test/MC/Disassembler/Hexagon/ld.txt b/llvm/test/MC/Disassembler/Hexagon/ld.txt index 91bb250733f..66e014fea59 100644 --- a/llvm/test/MC/Disassembler/Hexagon/ld.txt +++ b/llvm/test/MC/Disassembler/Hexagon/ld.txt @@ -3,25 +3,25 @@ # Load doubleword 0x90 0xff 0xd5 0x3a -# CHECK: r17:16 = memd(r21 + r31<<#3) +# CHECK: r17:16 = memd(r21+r31<<#3) 0xb0 0xc2 0xc0 0x49 # CHECK: r17:16 = memd(gp+#168) 0x02 0x40 0x00 0x00 0x10 0xc5 0xc0 0x49 # CHECK: r17:16 = memd(##168) 0xd0 0xc0 0xd5 0x91 -# CHECK: r17:16 = memd(r21 + #48) +# CHECK: r17:16 = memd(r21+#48) 0xb0 0xe0 0xd5 0x99 -# CHECK: r17:16 = memd(r21 ++ #40:circ(m1)) +# CHECK: r17:16 = memd(r21++#40:circ(m1)) 0x10 0xe2 0xd5 0x99 -# CHECK: r17:16 = memd(r21 ++ I:circ(m1)) +# CHECK: r17:16 = memd(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x70 0xd7 0xd5 0x9b -# CHECK: r17:16 = memd(r21 = ##31) +# CHECK: r17:16 = memd(r21=##31) 0xb0 0xc0 0xd5 0x9b # CHECK: r17:16 = memd(r21++#40) 0x10 0xe0 0xd5 0x9d # CHECK: r17:16 = memd(r21++m1) 0x10 0xe0 0xd5 0x9f -# CHECK: r17:16 = memd(r21 ++ m1:brev) +# CHECK: r17:16 = memd(r21++m1:brev) # Load doubleword conditionally 0xf0 0xff 0xd5 0x30 @@ -35,15 +35,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) r17:16 = memd(r21+r31<<#3) 0x70 0xd8 0xd5 0x41 -# CHECK: if (p3) r17:16 = memd(r21 + #24) +# CHECK: if (p3) r17:16 = memd(r21+#24) 0x03 0x40 0x45 0x85 0x70 0xd8 0xd5 0x43 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17:16 = memd(r21 + #24) +# CHECK-NEXT: if (p3.new) r17:16 = memd(r21+#24) 0x70 0xd8 0xd5 0x45 -# CHECK: if (!p3) r17:16 = memd(r21 + #24) +# CHECK: if (!p3) r17:16 = memd(r21+#24) 0x03 0x40 0x45 0x85 0x70 0xd8 0xd5 0x47 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17:16 = memd(r21 + #24) +# CHECK-NEXT: if (!p3.new) r17:16 = memd(r21+#24) 0xb0 0xe6 0xd5 0x9b # CHECK: if (p3) r17:16 = memd(r21++#40) 0xb0 0xee 0xd5 0x9b @@ -57,25 +57,25 @@ # Load byte 0x91 0xff 0x15 0x3a -# CHECK: r17 = memb(r21 + r31<<#3) +# CHECK: r17 = memb(r21+r31<<#3) 0xb1 0xc2 0x00 0x49 # CHECK: r17 = memb(gp+#21) 0x00 0x40 0x00 0x00 0xb1 0xc2 0x00 0x49 # CHECK: r17 = memb(##21) 0xf1 0xc3 0x15 0x91 -# CHECK: r17 = memb(r21 + #31) +# CHECK: r17 = memb(r21+#31) 0xb1 0xe0 0x15 0x99 -# CHECK: r17 = memb(r21 ++ #5:circ(m1)) +# CHECK: r17 = memb(r21++#5:circ(m1)) 0x11 0xe2 0x15 0x99 -# CHECK: r17 = memb(r21 ++ I:circ(m1)) +# CHECK: r17 = memb(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x71 0xd7 0x15 0x9b -# CHECK: r17 = memb(r21 = ##31) +# CHECK: r17 = memb(r21=##31) 0xb1 0xc0 0x15 0x9b # CHECK: r17 = memb(r21++#5) 0x11 0xe0 0x15 0x9d # CHECK: r17 = memb(r21++m1) 0x11 0xe0 0x15 0x9f -# CHECK: r17 = memb(r21 ++ m1:brev) +# CHECK: r17 = memb(r21++m1:brev) # Load byte conditionally 0xf1 0xff 0x15 0x30 @@ -89,15 +89,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) r17 = memb(r21+r31<<#3) 0x91 0xdd 0x15 0x41 -# CHECK: if (p3) r17 = memb(r21 + #44) +# CHECK: if (p3) r17 = memb(r21+#44) 0x03 0x40 0x45 0x85 0x91 0xdd 0x15 0x43 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = memb(r21 + #44) +# CHECK-NEXT: if (p3.new) r17 = memb(r21+#44) 0x91 0xdd 0x15 0x45 -# CHECK: if (!p3) r17 = memb(r21 + #44) +# CHECK: if (!p3) r17 = memb(r21+#44) 0x03 0x40 0x45 0x85 0x91 0xdd 0x15 0x47 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = memb(r21 + #44) +# CHECK-NEXT: if (!p3.new) r17 = memb(r21+#44) 0xb1 0xe6 0x15 0x9b # CHECK: if (p3) r17 = memb(r21++#5) 0xb1 0xee 0x15 0x9b @@ -111,41 +111,41 @@ # Load byte into shifted vector 0xf0 0xc3 0x95 0x90 -# CHECK: r17:16 = memb_fifo(r21 + #31) +# CHECK: r17:16 = memb_fifo(r21+#31) 0xb0 0xe0 0x95 0x98 -# CHECK: r17:16 = memb_fifo(r21 ++ #5:circ(m1)) +# CHECK: r17:16 = memb_fifo(r21++#5:circ(m1)) 0x10 0xe2 0x95 0x98 -# CHECK: r17:16 = memb_fifo(r21 ++ I:circ(m1)) +# CHECK: r17:16 = memb_fifo(r21++I:circ(m1)) # Load half into shifted vector 0xf0 0xc3 0x55 0x90 -# CHECK: r17:16 = memh_fifo(r21 + #62) +# CHECK: r17:16 = memh_fifo(r21+#62) 0xb0 0xe0 0x55 0x98 -# CHECK: r17:16 = memh_fifo(r21 ++ #10:circ(m1)) +# CHECK: r17:16 = memh_fifo(r21++#10:circ(m1)) 0x10 0xe2 0x55 0x98 -# CHECK: r17:16 = memh_fifo(r21 ++ I:circ(m1)) +# CHECK: r17:16 = memh_fifo(r21++I:circ(m1)) # Load halfword 0x91 0xff 0x55 0x3a -# CHECK: r17 = memh(r21 + r31<<#3) +# CHECK: r17 = memh(r21+r31<<#3) 0xb1 0xc2 0x40 0x49 # CHECK: r17 = memh(gp+#42) 0x00 0x40 0x00 0x00 0x51 0xc5 0x40 0x49 # CHECK: r17 = memh(##42) 0xf1 0xc3 0x55 0x91 -# CHECK: r17 = memh(r21 + #62) +# CHECK: r17 = memh(r21+#62) 0xb1 0xe0 0x55 0x99 -# CHECK: r17 = memh(r21 ++ #10:circ(m1)) +# CHECK: r17 = memh(r21++#10:circ(m1)) 0x11 0xe2 0x55 0x99 -# CHECK: r17 = memh(r21 ++ I:circ(m1)) +# CHECK: r17 = memh(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x71 0xd7 0x55 0x9b -# CHECK: r17 = memh(r21 = ##31) +# CHECK: r17 = memh(r21=##31) 0xb1 0xc0 0x55 0x9b # CHECK: r17 = memh(r21++#10) 0x11 0xe0 0x55 0x9d # CHECK: r17 = memh(r21++m1) 0x11 0xe0 0x55 0x9f -# CHECK: r17 = memh(r21 ++ m1:brev) +# CHECK: r17 = memh(r21++m1:brev) # Load halfword conditionally 0xf1 0xff 0x55 0x30 @@ -169,37 +169,37 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) r17 = memh(r21++#10) 0xf1 0xdb 0x55 0x41 -# CHECK: if (p3) r17 = memh(r21 + #62) +# CHECK: if (p3) r17 = memh(r21+#62) 0xf1 0xdb 0x55 0x45 -# CHECK: if (!p3) r17 = memh(r21 + #62) +# CHECK: if (!p3) r17 = memh(r21+#62) 0x03 0x40 0x45 0x85 0xf1 0xdb 0x55 0x43 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = memh(r21 + #62) +# CHECK-NEXT: if (p3.new) r17 = memh(r21+#62) 0x03 0x40 0x45 0x85 0xf1 0xdb 0x55 0x47 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = memh(r21 + #62) +# CHECK-NEXT: if (!p3.new) r17 = memh(r21+#62) # Load unsigned byte 0x91 0xff 0x35 0x3a -# CHECK: r17 = memub(r21 + r31<<#3) +# CHECK: r17 = memub(r21+r31<<#3) 0xb1 0xc2 0x20 0x49 # CHECK: r17 = memub(gp+#21) 0x00 0x40 0x00 0x00 0xb1 0xc2 0x20 0x49 # CHECK: r17 = memub(##21) 0xf1 0xc3 0x35 0x91 -# CHECK: r17 = memub(r21 + #31) +# CHECK: r17 = memub(r21+#31) 0xb1 0xe0 0x35 0x99 -# CHECK: r17 = memub(r21 ++ #5:circ(m1)) +# CHECK: r17 = memub(r21++#5:circ(m1)) 0x11 0xe2 0x35 0x99 -# CHECK: r17 = memub(r21 ++ I:circ(m1)) +# CHECK: r17 = memub(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x71 0xd7 0x35 0x9b -# CHECK: r17 = memub(r21 = ##31) +# CHECK: r17 = memub(r21=##31) 0xb1 0xc0 0x35 0x9b # CHECK: r17 = memub(r21++#5) 0x11 0xe0 0x35 0x9d # CHECK: r17 = memub(r21++m1) 0x11 0xe0 0x35 0x9f -# CHECK: r17 = memub(r21 ++ m1:brev) +# CHECK: r17 = memub(r21++m1:brev) # Load unsigned byte conditionally 0xf1 0xff 0x35 0x30 @@ -213,15 +213,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) r17 = memub(r21+r31<<#3) 0xf1 0xdb 0x35 0x41 -# CHECK: if (p3) r17 = memub(r21 + #31) +# CHECK: if (p3) r17 = memub(r21+#31) 0x03 0x40 0x45 0x85 0xf1 0xdb 0x35 0x43 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = memub(r21 + #31) +# CHECK-NEXT: if (p3.new) r17 = memub(r21+#31) 0xf1 0xdb 0x35 0x45 -# CHECK: if (!p3) r17 = memub(r21 + #31) +# CHECK: if (!p3) r17 = memub(r21+#31) 0x03 0x40 0x45 0x85 0xf1 0xdb 0x35 0x47 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = memub(r21 + #31) +# CHECK-NEXT: if (!p3.new) r17 = memub(r21+#31) 0xb1 0xe6 0x35 0x9b # CHECK: if (p3) r17 = memub(r21++#5) 0xb1 0xee 0x35 0x9b @@ -235,25 +235,25 @@ # Load unsigned halfword 0x91 0xff 0x75 0x3a -# CHECK: r17 = memuh(r21 + r31<<#3) +# CHECK: r17 = memuh(r21+r31<<#3) 0xb1 0xc2 0x60 0x49 # CHECK: r17 = memuh(gp+#42) 0x00 0x40 0x00 0x00 0x51 0xc5 0x60 0x49 # CHECK: r17 = memuh(##42) 0xb1 0xc2 0x75 0x91 -# CHECK: r17 = memuh(r21 + #42) +# CHECK: r17 = memuh(r21+#42) 0xb1 0xe0 0x75 0x99 -# CHECK: r17 = memuh(r21 ++ #10:circ(m1)) +# CHECK: r17 = memuh(r21++#10:circ(m1)) 0x11 0xe2 0x75 0x99 -# CHECK: r17 = memuh(r21 ++ I:circ(m1)) +# CHECK: r17 = memuh(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x71 0xd7 0x75 0x9b -# CHECK: r17 = memuh(r21 = ##31) +# CHECK: r17 = memuh(r21=##31) 0xb1 0xc0 0x75 0x9b # CHECK: r17 = memuh(r21++#10) 0x11 0xe0 0x75 0x9d # CHECK: r17 = memuh(r21++m1) 0x11 0xe0 0x75 0x9f -# CHECK: r17 = memuh(r21 ++ m1:brev) +# CHECK: r17 = memuh(r21++m1:brev) # Load unsigned halfword conditionally 0xf1 0xff 0x75 0x30 @@ -267,15 +267,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) r17 = memuh(r21+r31<<#3) 0xb1 0xda 0x75 0x41 -# CHECK: if (p3) r17 = memuh(r21 + #42) +# CHECK: if (p3) r17 = memuh(r21+#42) 0xb1 0xda 0x75 0x45 -# CHECK: if (!p3) r17 = memuh(r21 + #42) +# CHECK: if (!p3) r17 = memuh(r21+#42) 0x03 0x40 0x45 0x85 0xb1 0xda 0x75 0x43 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = memuh(r21 + #42) +# CHECK-NEXT: if (p3.new) r17 = memuh(r21+#42) 0x03 0x40 0x45 0x85 0xb1 0xda 0x75 0x47 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = memuh(r21 + #42) +# CHECK-NEXT: if (!p3.new) r17 = memuh(r21+#42) 0xb1 0xe6 0x75 0x9b # CHECK: if (p3) r17 = memuh(r21++#10) 0xb1 0xee 0x75 0x9b @@ -289,25 +289,25 @@ # Load word 0x91 0xff 0x95 0x3a -# CHECK: r17 = memw(r21 + r31<<#3) +# CHECK: r17 = memw(r21+r31<<#3) 0xb1 0xc2 0x80 0x49 # CHECK: r17 = memw(gp+#84) 0x01 0x40 0x00 0x00 0x91 0xc2 0x80 0x49 # CHECK: r17 = memw(##84) 0xb1 0xc2 0x95 0x91 -# CHECK: r17 = memw(r21 + #84) +# CHECK: r17 = memw(r21+#84) 0xb1 0xe0 0x95 0x99 -# CHECK: r17 = memw(r21 ++ #20:circ(m1)) +# CHECK: r17 = memw(r21++#20:circ(m1)) 0x11 0xe2 0x95 0x99 -# CHECK: r17 = memw(r21 ++ I:circ(m1)) +# CHECK: r17 = memw(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x71 0xd7 0x95 0x9b -# CHECK: r17 = memw(r21 = ##31) +# CHECK: r17 = memw(r21=##31) 0xb1 0xc0 0x95 0x9b # CHECK: r17 = memw(r21++#20) 0x11 0xe0 0x95 0x9d # CHECK: r17 = memw(r21++m1) 0x11 0xe0 0x95 0x9f -# CHECK: r17 = memw(r21 ++ m1:brev) +# CHECK: r17 = memw(r21++m1:brev) # Load word conditionally 0xf1 0xff 0x95 0x30 @@ -321,15 +321,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) r17 = memw(r21+r31<<#3) 0xb1 0xda 0x95 0x41 -# CHECK: if (p3) r17 = memw(r21 + #84) +# CHECK: if (p3) r17 = memw(r21+#84) 0xb1 0xda 0x95 0x45 -# CHECK: if (!p3) r17 = memw(r21 + #84) +# CHECK: if (!p3) r17 = memw(r21+#84) 0x03 0x40 0x45 0x85 0xb1 0xda 0x95 0x43 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) r17 = memw(r21 + #84) +# CHECK-NEXT: if (p3.new) r17 = memw(r21+#84) 0x03 0x40 0x45 0x85 0xb1 0xda 0x95 0x47 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) r17 = memw(r21 + #84) +# CHECK-NEXT: if (!p3.new) r17 = memw(r21+#84) 0xb1 0xe6 0x95 0x9b # CHECK: if (p3) r17 = memw(r21++#20) 0xb1 0xee 0x95 0x9b @@ -367,59 +367,59 @@ # Load and unpack bytes to halfwords 0xf1 0xc3 0x35 0x90 -# CHECK: r17 = membh(r21 + #62) +# CHECK: r17 = membh(r21+#62) 0xf1 0xc3 0x75 0x90 -# CHECK: r17 = memubh(r21 + #62) +# CHECK: r17 = memubh(r21+#62) 0xf0 0xc3 0xb5 0x90 -# CHECK: r17:16 = memubh(r21 + #124) +# CHECK: r17:16 = memubh(r21+#124) 0xf0 0xc3 0xf5 0x90 -# CHECK: r17:16 = membh(r21 + #124) +# CHECK: r17:16 = membh(r21+#124) 0xb1 0xe0 0x35 0x98 -# CHECK: r17 = membh(r21 ++ #10:circ(m1)) +# CHECK: r17 = membh(r21++#10:circ(m1)) 0x11 0xe2 0x35 0x98 -# CHECK: r17 = membh(r21 ++ I:circ(m1)) +# CHECK: r17 = membh(r21++I:circ(m1)) 0xb1 0xe0 0x75 0x98 -# CHECK: r17 = memubh(r21 ++ #10:circ(m1)) +# CHECK: r17 = memubh(r21++#10:circ(m1)) 0x11 0xe2 0x75 0x98 -# CHECK: r17 = memubh(r21 ++ I:circ(m1)) +# CHECK: r17 = memubh(r21++I:circ(m1)) 0xb0 0xe0 0xf5 0x98 -# CHECK: r17:16 = membh(r21 ++ #20:circ(m1)) +# CHECK: r17:16 = membh(r21++#20:circ(m1)) 0x10 0xe2 0xf5 0x98 -# CHECK: r17:16 = membh(r21 ++ I:circ(m1)) +# CHECK: r17:16 = membh(r21++I:circ(m1)) 0xb0 0xe0 0xb5 0x98 -# CHECK: r17:16 = memubh(r21 ++ #20:circ(m1)) +# CHECK: r17:16 = memubh(r21++#20:circ(m1)) 0x10 0xe2 0xb5 0x98 -# CHECK: r17:16 = memubh(r21 ++ I:circ(m1)) +# CHECK: r17:16 = memubh(r21++I:circ(m1)) 0x00 0x40 0x00 0x00 0x71 0xd7 0x35 0x9a -# CHECK: r17 = membh(r21 = ##31) +# CHECK: r17 = membh(r21=##31) 0xb1 0xc0 0x35 0x9a # CHECK: r17 = membh(r21++#10) 0x00 0x40 0x00 0x00 0x71 0xd7 0x75 0x9a -# CHECK: r17 = memubh(r21 = ##31) +# CHECK: r17 = memubh(r21=##31) 0xb1 0xc0 0x75 0x9a # CHECK: r17 = memubh(r21++#10) 0x00 0x40 0x00 0x00 0x70 0xd7 0xb5 0x9a -# CHECK: r17:16 = memubh(r21 = ##31) +# CHECK: r17:16 = memubh(r21=##31) 0xb0 0xc0 0xb5 0x9a # CHECK: r17:16 = memubh(r21++#20) 0x00 0x40 0x00 0x00 0x70 0xd7 0xf5 0x9a -# CHECK: r17:16 = membh(r21 = ##31) +# CHECK: r17:16 = membh(r21=##31) 0xb0 0xc0 0xf5 0x9a # CHECK: r17:16 = membh(r21++#20) 0x00 0x40 0x00 0x00 0xf1 0xf7 0x35 0x9c -# CHECK: r17 = membh(r21<<#3 + ##31) +# CHECK: r17 = membh(r21<<#3+##31) 0x11 0xe0 0x35 0x9c # CHECK: r17 = membh(r21++m1) 0x00 0x40 0x00 0x00 0xf1 0xf7 0x75 0x9c -# CHECK: r17 = memubh(r21<<#3 + ##31) +# CHECK: r17 = memubh(r21<<#3+##31) 0x11 0xe0 0x75 0x9c # CHECK: r17 = memubh(r21++m1) 0x00 0x40 0x00 0x00 0xf0 0xf7 0xf5 0x9c -# CHECK: r17:16 = membh(r21<<#3 + ##31) +# CHECK: r17:16 = membh(r21<<#3+##31) 0x10 0xe0 0xf5 0x9c # CHECK: r17:16 = membh(r21++m1) 0x00 0x40 0x00 0x00 0xf0 0xf7 0xb5 0x9c -# CHECK: r17:16 = memubh(r21<<#3 + ##31) +# CHECK: r17:16 = memubh(r21<<#3+##31) 0x11 0xe0 0x35 0x9c # CHECK: r17 = membh(r21++m1) 0x11 0xe0 0x75 0x9c @@ -429,10 +429,10 @@ 0x10 0xe0 0xb5 0x9c # CHECK: r17:16 = memubh(r21++m1) 0x11 0xe0 0x35 0x9e -# CHECK: r17 = membh(r21 ++ m1:brev) +# CHECK: r17 = membh(r21++m1:brev) 0x11 0xe0 0x75 0x9e -# CHECK: r17 = memubh(r21 ++ m1:brev) +# CHECK: r17 = memubh(r21++m1:brev) 0x10 0xe0 0xb5 0x9e -# CHECK: r17:16 = memubh(r21 ++ m1:brev) +# CHECK: r17:16 = memubh(r21++m1:brev) 0x10 0xe0 0xf5 0x9e -# CHECK: r17:16 = membh(r21 ++ m1:brev) +# CHECK: r17:16 = membh(r21++m1:brev) diff --git a/llvm/test/MC/Disassembler/Hexagon/nv_j.txt b/llvm/test/MC/Disassembler/Hexagon/nv_j.txt index 2135b5a039f..f3b7140f8a7 100644 --- a/llvm/test/MC/Disassembler/Hexagon/nv_j.txt +++ b/llvm/test/MC/Disassembler/Hexagon/nv_j.txt @@ -4,133 +4,133 @@ # Jump to address conditioned on new register value 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.eq(r17.new, r21)) jump:nt +# CHECK-NEXT: if (cmp.eq(r17.new,r21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.eq(r17.new, r21)) jump:t +# CHECK-NEXT: if (cmp.eq(r17.new,r21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.eq(r17.new, r21)) jump:nt +# CHECK-NEXT: if (!cmp.eq(r17.new,r21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.eq(r17.new, r21)) jump:t +# CHECK-NEXT: if (!cmp.eq(r17.new,r21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r17.new, r21)) jump:nt +# CHECK-NEXT: if (cmp.gt(r17.new,r21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r17.new, r21)) jump:t +# CHECK-NEXT: if (cmp.gt(r17.new,r21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r17.new, r21)) jump:nt +# CHECK-NEXT: if (!cmp.gt(r17.new,r21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x20 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r17.new, r21)) jump:t +# CHECK-NEXT: if (!cmp.gt(r17.new,r21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gtu(r17.new, r21)) jump:nt +# CHECK-NEXT: if (cmp.gtu(r17.new,r21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gtu(r17.new, r21)) jump:t +# CHECK-NEXT: if (cmp.gtu(r17.new,r21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gtu(r17.new, r21)) jump:nt +# CHECK-NEXT: if (!cmp.gtu(r17.new,r21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gtu(r17.new, r21)) jump:t +# CHECK-NEXT: if (!cmp.gtu(r17.new,r21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r21, r17.new)) jump:nt +# CHECK-NEXT: if (cmp.gt(r21,r17.new)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r21, r17.new)) jump:t +# CHECK-NEXT: if (cmp.gt(r21,r17.new)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r21, r17.new)) jump:nt +# CHECK-NEXT: if (!cmp.gt(r21,r17.new)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x21 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r21, r17.new)) jump:t +# CHECK-NEXT: if (!cmp.gt(r21,r17.new)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x22 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gtu(r21, r17.new)) jump:nt +# CHECK-NEXT: if (cmp.gtu(r21,r17.new)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x22 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gtu(r21, r17.new)) jump:t +# CHECK-NEXT: if (cmp.gtu(r21,r17.new)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x22 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gtu(r21, r17.new)) jump:nt +# CHECK-NEXT: if (!cmp.gtu(r21,r17.new)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x22 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gtu(r21, r17.new)) jump:t +# CHECK-NEXT: if (!cmp.gtu(r21,r17.new)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.eq(r17.new, #21)) jump:nt +# CHECK-NEXT: if (cmp.eq(r17.new,#21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x24 # CHECK: r17 = r17 -# CHECK-NETX: if (cmp.eq(r17.new, #21)) jump:t +# CHECK-NETX: if (cmp.eq(r17.new,#21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.eq(r17.new, #21)) jump:nt +# CHECK-NEXT: if (!cmp.eq(r17.new,#21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.eq(r17.new, #21)) jump:t +# CHECK-NEXT: if (!cmp.eq(r17.new,#21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r17.new, #21)) jump:nt +# CHECK-NEXT: if (cmp.gt(r17.new,#21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r17.new, #21)) jump:t +# CHECK-NEXT: if (cmp.gt(r17.new,#21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r17.new, #21)) jump:nt +# CHECK-NEXT: if (!cmp.gt(r17.new,#21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x24 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r17.new, #21)) jump:t +# CHECK-NEXT: if (!cmp.gt(r17.new,#21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gtu(r17.new, #21)) jump:nt +# CHECK-NEXT: if (cmp.gtu(r17.new,#21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gtu(r17.new, #21)) jump:t +# CHECK-NEXT: if (cmp.gtu(r17.new,#21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gtu(r17.new, #21)) jump:nt +# CHECK-NEXT: if (!cmp.gtu(r17.new,#21)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gtu(r17.new, #21)) jump:t +# CHECK-NEXT: if (!cmp.gtu(r17.new,#21)) jump:t 0x11 0x40 0x71 0x70 0x92 0xc0 0x82 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (tstbit(r17.new, #0)) jump:nt +# CHECK-NEXT: if (tstbit(r17.new,#0)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xe0 0x82 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (tstbit(r17.new, #0)) jump:t +# CHECK-NEXT: if (tstbit(r17.new,#0)) jump:t 0x11 0x40 0x71 0x70 0x92 0xc0 0xc2 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (!tstbit(r17.new, #0)) jump:nt +# CHECK-NEXT: if (!tstbit(r17.new,#0)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xe0 0xc2 0x25 # CHECK: r17 = r17 -# CHECK-NEXT: if (!tstbit(r17.new, #0)) jump:t +# CHECK-NEXT: if (!tstbit(r17.new,#0)) jump:t 0x11 0x40 0x71 0x70 0x92 0xc0 0x02 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.eq(r17.new, #-1)) jump:nt +# CHECK-NEXT: if (cmp.eq(r17.new,#-1)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xe0 0x02 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.eq(r17.new, #-1)) jump:t +# CHECK-NEXT: if (cmp.eq(r17.new,#-1)) jump:t 0x11 0x40 0x71 0x70 0x92 0xc0 0x42 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.eq(r17.new, #-1)) jump:nt +# CHECK-NEXT: if (!cmp.eq(r17.new,#-1)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xe0 0x42 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.eq(r17.new, #-1)) jump:t +# CHECK-NEXT: if (!cmp.eq(r17.new,#-1)) jump:t 0x11 0x40 0x71 0x70 0x92 0xc0 0x82 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r17.new, #-1)) jump:nt +# CHECK-NEXT: if (cmp.gt(r17.new,#-1)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xe0 0x82 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (cmp.gt(r17.new, #-1)) jump:t +# CHECK-NEXT: if (cmp.gt(r17.new,#-1)) jump:t 0x11 0x40 0x71 0x70 0x92 0xc0 0xc2 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r17.new, #-1)) jump:nt +# CHECK-NEXT: if (!cmp.gt(r17.new,#-1)) jump:nt 0x11 0x40 0x71 0x70 0x92 0xe0 0xc2 0x26 # CHECK: r17 = r17 -# CHECK-NEXT: if (!cmp.gt(r17.new, #-1)) jump:t +# CHECK-NEXT: if (!cmp.gt(r17.new,#-1)) jump:t diff --git a/llvm/test/MC/Disassembler/Hexagon/nv_st.txt b/llvm/test/MC/Disassembler/Hexagon/nv_st.txt index 9e3f9a776b8..7b76cb56dd3 100644 --- a/llvm/test/MC/Disassembler/Hexagon/nv_st.txt +++ b/llvm/test/MC/Disassembler/Hexagon/nv_st.txt @@ -4,7 +4,7 @@ # Store new-value byte 0x1f 0x40 0x7f 0x70 0x82 0xf5 0xb1 0x3b # CHECK: r31 = r31 -# CHECK-NEXT: memb(r17 + r21<<#3) = r31.new +# CHECK-NEXT: memb(r17+r21<<#3) = r31.new 0x1f 0x40 0x7f 0x70 0x11 0xc2 0xa0 0x48 # CHECK: r31 = r31 # CHECK-NEXT: memb(gp+#17) = r31.new @@ -13,10 +13,10 @@ # CHECK-NEXT: memb(r17+#21) = r31.new 0x1f 0x40 0x7f 0x70 0x02 0xe2 0xb1 0xa9 # CHECK: r31 = r31 -# CHECK-NEXT: memb(r17 ++ I:circ(m1)) = r31.new +# CHECK-NEXT: memb(r17++I:circ(m1)) = r31.new 0x1f 0x40 0x7f 0x70 0x28 0xe2 0xb1 0xa9 # CHECK: r31 = r31 -# CHECK-NEXT: memb(r17 ++ #5:circ(m1)) = r31.new +# CHECK-NEXT: memb(r17++#5:circ(m1)) = r31.new 0x1f 0x40 0x7f 0x70 0x28 0xc2 0xb1 0xab # CHECK: r31 = r31 # CHECK-NEXT: memb(r17++#5) = r31.new @@ -25,7 +25,7 @@ # CHECK-NEXT: memb(r17++m1) = r31.new 0x1f 0x40 0x7f 0x70 0x00 0xe2 0xb1 0xaf # CHECK: r31 = r31 -# CHECK-NEXT: memb(r17 ++ m1:brev) = r31.new +# CHECK-NEXT: memb(r17++m1:brev) = r31.new # Store new-value byte conditionally 0x1f 0x40 0x7f 0x70 0xe2 0xf5 0xb1 0x34 @@ -74,7 +74,7 @@ # Store new-value halfword 0x1f 0x40 0x7f 0x70 0x8a 0xf5 0xb1 0x3b # CHECK: r31 = r31 -# CHECK-NEXT: memh(r17 + r21<<#3) = r31.new +# CHECK-NEXT: memh(r17+r21<<#3) = r31.new 0x1f 0x40 0x7f 0x70 0x15 0xca 0xa0 0x48 # CHECK: r31 = r31 # CHECK-NEXT: memh(gp+#42) = r31.new @@ -83,10 +83,10 @@ # CHECK-NEXT: memh(r17+#42) = r31.new 0x1f 0x40 0x7f 0x70 0x02 0xea 0xb1 0xa9 # CHECK: r31 = r31 -# CHECK-NEXT: memh(r17 ++ I:circ(m1)) = r31.new +# CHECK-NEXT: memh(r17++I:circ(m1)) = r31.new 0x1f 0x40 0x7f 0x70 0x28 0xea 0xb1 0xa9 # CHECK: r31 = r31 -# CHECK-NEXT: memh(r17 ++ #10:circ(m1)) = r31.new +# CHECK-NEXT: memh(r17++#10:circ(m1)) = r31.new 0x1f 0x40 0x7f 0x70 0x28 0xca 0xb1 0xab # CHECK: r31 = r31 # CHECK-NEXT: memh(r17++#10) = r31.new @@ -95,7 +95,7 @@ # CHECK-NEXT: memh(r17++m1) = r31.new 0x1f 0x40 0x7f 0x70 0x00 0xea 0xb1 0xaf # CHECK: r31 = r31 -# CHECK-NEXT: memh(r17 ++ m1:brev) = r31.new +# CHECK-NEXT: memh(r17++m1:brev) = r31.new # Store new-value halfword conditionally 0x1f 0x40 0x7f 0x70 0xea 0xf5 0xb1 0x34 @@ -144,7 +144,7 @@ # Store new-value word 0x1f 0x40 0x7f 0x70 0x92 0xf5 0xb1 0x3b # CHECK: r31 = r31 -# CHECK-NEXT: memw(r17 + r21<<#3) = r31.new +# CHECK-NEXT: memw(r17+r21<<#3) = r31.new 0x1f 0x40 0x7f 0x70 0x15 0xd2 0xa0 0x48 # CHECK: r31 = r31 # CHECK-NEXT: memw(gp+#84) = r31.new @@ -153,10 +153,10 @@ # CHECK-NEXT: memw(r17+#84) = r31.new 0x1f 0x40 0x7f 0x70 0x02 0xf2 0xb1 0xa9 # CHECK: r31 = r31 -# CHECK-NEXT: memw(r17 ++ I:circ(m1)) = r31.new +# CHECK-NEXT: memw(r17++I:circ(m1)) = r31.new 0x1f 0x40 0x7f 0x70 0x28 0xf2 0xb1 0xa9 # CHECK: r31 = r31 -# CHECK-NEXT: memw(r17 ++ #20:circ(m1)) = r31.new +# CHECK-NEXT: memw(r17++#20:circ(m1)) = r31.new 0x1f 0x40 0x7f 0x70 0x28 0xd2 0xb1 0xab # CHECK: r31 = r31 # CHECK-NEXT: memw(r17++#20) = r31.new @@ -165,7 +165,7 @@ # CHECK-NEXT: memw(r17++m1) = r31.new 0x1f 0x40 0x7f 0x70 0x00 0xf2 0xb1 0xaf # CHECK: r31 = r31 -# CHECK-NEXT: memw(r17 ++ m1:brev) = r31.new +# CHECK-NEXT: memw(r17++m1:brev) = r31.new # Store new-value word conditionally 0x1f 0x40 0x7f 0x70 0xf2 0xf5 0xb1 0x34 diff --git a/llvm/test/MC/Disassembler/Hexagon/st.txt b/llvm/test/MC/Disassembler/Hexagon/st.txt index 601047e88a2..0f936c267f5 100644 --- a/llvm/test/MC/Disassembler/Hexagon/st.txt +++ b/llvm/test/MC/Disassembler/Hexagon/st.txt @@ -3,7 +3,7 @@ # Store doubleword 0x9e 0xf5 0xd1 0x3b -# CHECK: memd(r17 + r21<<#3) = r31:30 +# CHECK: memd(r17+r21<<#3) = r31:30 0x28 0xd4 0xc0 0x48 # CHECK: memd(gp+#320) = r21:20 0x02 0x40 0x00 0x00 0x28 0xd4 0xc0 0x48 @@ -11,17 +11,17 @@ 0x15 0xd4 0xd1 0xa1 # CHECK: memd(r17+#168) = r21:20 0x02 0xf4 0xd1 0xa9 -# CHECK: memd(r17 ++ I:circ(m1)) = r21:20 +# CHECK: memd(r17++I:circ(m1)) = r21:20 0x28 0xf4 0xd1 0xa9 -# CHECK: memd(r17 ++ #40:circ(m1)) = r21:20 +# CHECK: memd(r17++#40:circ(m1)) = r21:20 0x28 0xd4 0xd1 0xab # CHECK: memd(r17++#40) = r21:20 0x00 0x40 0x00 0x00 0xd5 0xfe 0xd1 0xad -# CHECK: memd(r17<<#3 + ##21) = r31:30 +# CHECK: memd(r17<<#3+##21) = r31:30 0x00 0xf4 0xd1 0xad # CHECK: memd(r17++m1) = r21:20 0x00 0xf4 0xd1 0xaf -# CHECK: memd(r17 ++ m1:brev) = r21:20 +# CHECK: memd(r17++m1:brev) = r21:20 # Store doubleword conditionally 0xfe 0xf5 0xd1 0x34 @@ -67,9 +67,9 @@ # Store byte 0x9f 0xf5 0x11 0x3b -# CHECK: memb(r17 + r21<<#3) = r31 +# CHECK: memb(r17+r21<<#3) = r31 0x9f 0xca 0x11 0x3c -# CHECK: memb(r17+#21)=#31 +# CHECK: memb(r17+#21) = #31 0x15 0xd5 0x00 0x48 # CHECK: memb(gp+#21) = r21 0x00 0x40 0x00 0x00 0x15 0xd5 0x00 0x48 @@ -77,17 +77,17 @@ 0x15 0xd5 0x11 0xa1 # CHECK: memb(r17+#21) = r21 0x02 0xf5 0x11 0xa9 -# CHECK: memb(r17 ++ I:circ(m1)) = r21 +# CHECK: memb(r17++I:circ(m1)) = r21 0x28 0xf5 0x11 0xa9 -# CHECK: memb(r17 ++ #5:circ(m1)) = r21 +# CHECK: memb(r17++#5:circ(m1)) = r21 0x28 0xd5 0x11 0xab # CHECK: memb(r17++#5) = r21 0x00 0x40 0x00 0x00 0xd5 0xff 0x11 0xad -# CHECK: memb(r17<<#3 + ##21) = r31 +# CHECK: memb(r17<<#3+##21) = r31 0x00 0xf5 0x11 0xad # CHECK: memb(r17++m1) = r21 0x00 0xf5 0x11 0xaf -# CHECK: memb(r17 ++ m1:brev) = r21 +# CHECK: memb(r17++m1:brev) = r21 # Store byte conditionally 0xff 0xf5 0x11 0x34 @@ -101,15 +101,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) memb(r17+r21<<#3) = r31 0xff 0xca 0x11 0x38 -# CHECK: if (p3) memb(r17+#21)=#31 +# CHECK: if (p3) memb(r17+#21) = #31 0xff 0xca 0x91 0x38 -# CHECK: if (!p3) memb(r17+#21)=#31 +# CHECK: if (!p3) memb(r17+#21) = #31 0x03 0x40 0x45 0x85 0xff 0xca 0x11 0x39 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) memb(r17+#21)=#31 +# CHECK-NEXT: if (p3.new) memb(r17+#21) = #31 0x03 0x40 0x45 0x85 0xff 0xca 0x91 0x39 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) memb(r17+#21)=#31 +# CHECK-NEXT: if (!p3.new) memb(r17+#21) = #31 0xab 0xdf 0x11 0x40 # CHECK: if (p3) memb(r17+#21) = r31 0xab 0xdf 0x11 0x44 @@ -143,11 +143,11 @@ # Store halfword 0x9f 0xf5 0x51 0x3b -# CHECK: memh(r17 + r21<<#3) = r31 +# CHECK: memh(r17+r21<<#3) = r31 0x9f 0xf5 0x71 0x3b -# CHECK: memh(r17 + r21<<#3) = r31.h +# CHECK: memh(r17+r21<<#3) = r31.h 0x95 0xcf 0x31 0x3c -# CHECK: memh(r17+#62)=#21 +# CHECK: memh(r17+#62) = #21 0x00 0x40 0x00 0x00 0x2a 0xd5 0x40 0x48 # CHECK: memh(##42) = r21 0x00 0x40 0x00 0x00 0x2a 0xd5 0x60 0x48 @@ -161,29 +161,29 @@ 0x15 0xdf 0x71 0xa1 # CHECK: memh(r17+#42) = r31.h 0x02 0xf5 0x51 0xa9 -# CHECK: memh(r17 ++ I:circ(m1)) = r21 +# CHECK: memh(r17++I:circ(m1)) = r21 0x28 0xf5 0x51 0xa9 -# CHECK: memh(r17 ++ #10:circ(m1)) = r21 +# CHECK: memh(r17++#10:circ(m1)) = r21 0x02 0xf5 0x71 0xa9 -# CHECK: memh(r17 ++ I:circ(m1)) = r21.h +# CHECK: memh(r17++I:circ(m1)) = r21.h 0x28 0xf5 0x71 0xa9 -# CHECK: memh(r17 ++ #10:circ(m1)) = r21.h +# CHECK: memh(r17++#10:circ(m1)) = r21.h 0x28 0xd5 0x51 0xab # CHECK: memh(r17++#10) = r21 0x00 0x40 0x00 0x00 0xd5 0xff 0x51 0xad -# CHECK: memh(r17<<#3 + ##21) = r31 +# CHECK: memh(r17<<#3+##21) = r31 0x28 0xd5 0x71 0xab # CHECK: memh(r17++#10) = r21.h 0x00 0x40 0x00 0x00 0xd5 0xff 0x71 0xad -# CHECK: memh(r17<<#3 + ##21) = r31.h +# CHECK: memh(r17<<#3+##21) = r31.h 0x00 0xf5 0x51 0xad # CHECK: memh(r17++m1) = r21 0x00 0xf5 0x71 0xad # CHECK: memh(r17++m1) = r21.h 0x00 0xf5 0x51 0xaf -# CHECK: memh(r17 ++ m1:brev) = r21 +# CHECK: memh(r17++m1:brev) = r21 0x00 0xf5 0x71 0xaf -# CHECK: memh(r17 ++ m1:brev) = r21.h +# CHECK: memh(r17++m1:brev) = r21.h # Store halfword conditionally 0xff 0xf5 0x51 0x34 @@ -207,15 +207,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) memh(r17+r21<<#3) = r31.h 0xf5 0xcf 0x31 0x38 -# CHECK: if (p3) memh(r17+#62)=#21 +# CHECK: if (p3) memh(r17+#62) = #21 0xf5 0xcf 0xb1 0x38 -# CHECK: if (!p3) memh(r17+#62)=#21 +# CHECK: if (!p3) memh(r17+#62) = #21 0x03 0x40 0x45 0x85 0xf5 0xcf 0x31 0x39 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) memh(r17+#62)=#21 +# CHECK-NEXT: if (p3.new) memh(r17+#62) = #21 0x03 0x40 0x45 0x85 0xf5 0xcf 0xb1 0x39 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) memh(r17+#62)=#21 +# CHECK-NEXT: if (!p3.new) memh(r17+#62) = #21 0xfb 0xd5 0x51 0x40 # CHECK: if (p3) memh(r17+#62) = r21 0xfb 0xd5 0x71 0x40 @@ -279,29 +279,29 @@ # Store word 0x9f 0xf5 0x91 0x3b -# CHECK: memw(r17 + r21<<#3) = r31 +# CHECK: memw(r17+r21<<#3) = r31 0x9f 0xca 0x51 0x3c -# CHECK: memw(r17{{ *}}+{{ *}}#84)=#31 +# CHECK: memw(r17+#84) = #31 0x15 0xdf 0x80 0x48 # CHECK: memw(gp+#84) = r31 0x01 0x40 0x00 0x00 0x14 0xd5 0x80 0x48 # CHECK: memw(##84) = r21 0x9f 0xca 0x51 0x3c -# CHECK: memw(r17+#84)=#31 +# CHECK: memw(r17+#84) = #31 0x15 0xdf 0x91 0xa1 # CHECK: memw(r17+#84) = r31 0x02 0xf5 0x91 0xa9 -# CHECK: memw(r17 ++ I:circ(m1)) = r21 +# CHECK: memw(r17++I:circ(m1)) = r21 0x28 0xf5 0x91 0xa9 -# CHECK: memw(r17 ++ #20:circ(m1)) = r21 +# CHECK: memw(r17++#20:circ(m1)) = r21 0x28 0xd5 0x91 0xab # CHECK: memw(r17++#20) = r21 0x00 0x40 0x00 0x00 0xd5 0xff 0x91 0xad -# CHECK: memw(r17<<#3 + ##21) = r31 +# CHECK: memw(r17<<#3+##21) = r31 0x00 0xf5 0x91 0xad # CHECK: memw(r17++m1) = r21 0x00 0xf5 0x91 0xaf -# CHECK: memw(r17 ++ m1:brev) = r21 +# CHECK: memw(r17++m1:brev) = r21 # Store word conditionally 0xff 0xf5 0x91 0x34 @@ -315,15 +315,15 @@ # CHECK: p3 = r5 # CHECK-NEXT: if (!p3.new) memw(r17+r21<<#3) = r31 0xff 0xca 0x51 0x38 -# CHECK: if (p3) memw(r17+#84)=#31 +# CHECK: if (p3) memw(r17+#84) = #31 0xff 0xca 0xd1 0x38 -# CHECK: if (!p3) memw(r17+#84)=#31 +# CHECK: if (!p3) memw(r17+#84) = #31 0x03 0x40 0x45 0x85 0xff 0xca 0x51 0x39 # CHECK: p3 = r5 -# CHECK-NEXT: if (p3.new) memw(r17+#84)=#31 +# CHECK-NEXT: if (p3.new) memw(r17+#84) = #31 0x03 0x40 0x45 0x85 0xff 0xca 0xd1 0x39 # CHECK: p3 = r5 -# CHECK-NEXT: if (!p3.new) memw(r17+#84)=#31 +# CHECK-NEXT: if (!p3.new) memw(r17+#84) = #31 0xab 0xdf 0x91 0x40 # CHECK: if (p3) memw(r17+#84) = r31 0xab 0xdf 0x91 0x44 diff --git a/llvm/test/MC/Disassembler/Hexagon/system_user.txt b/llvm/test/MC/Disassembler/Hexagon/system_user.txt index d55a94e939b..f4d731059e0 100644 --- a/llvm/test/MC/Disassembler/Hexagon/system_user.txt +++ b/llvm/test/MC/Disassembler/Hexagon/system_user.txt @@ -9,9 +9,9 @@ # Store conditional 0x03 0xd5 0xb1 0xa0 -# CHECK: memw_locked(r17, p3) = r21 +# CHECK: memw_locked(r17,p3) = r21 0x03 0xd4 0xf1 0xa0 -# CHECK: memd_locked(r17, p3) = r21:20 +# CHECK: memd_locked(r17,p3) = r21:20 # Memory barrier 0x00 0xc0 0x00 0xa8 @@ -19,7 +19,7 @@ # Data cache prefetch 0x15 0xc0 0x11 0x94 -# CHECK: dcfetch(r17 + #168) +# CHECK: dcfetch(r17+#168) # Send value to ETM trace 0x00 0xc0 0x51 0x62 diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt index 03d0f0518a3..f05dafb3fce 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt @@ -11,137 +11,137 @@ # Add and accumulate 0xff 0xd1 0x35 0xdb -# CHECK: r17 = add(r21, add(r31, #23)) +# CHECK: r17 = add(r21,add(r31,#23)) 0xff 0xd1 0xb5 0xdb -# CHECK: r17 = add(r21, sub(#23, r31)) +# CHECK: r17 = add(r21,sub(#23,r31)) 0xf1 0xc2 0x15 0xe2 -# CHECK: r17 += add(r21, #23) +# CHECK: r17 += add(r21,#23) 0xf1 0xc2 0x95 0xe2 -# CHECK: r17 -= add(r21, #23) +# CHECK: r17 -= add(r21,#23) 0x31 0xdf 0x15 0xef -# CHECK: r17 += add(r21, r31) +# CHECK: r17 += add(r21,r31) 0x31 0xdf 0x95 0xef -# CHECK: r17 -= add(r21, r31) +# CHECK: r17 -= add(r21,r31) # Add doublewords 0xf0 0xde 0x14 0xd3 -# CHECK: r17:16 = add(r21:20, r31:30) +# CHECK: r17:16 = add(r21:20,r31:30) 0xb0 0xde 0x74 0xd3 -# CHECK: r17:16 = add(r21:20, r31:30):sat +# CHECK: r17:16 = add(r21:20,r31:30):sat 0xd0 0xde 0x74 0xd3 -# CHECK: r17:16 = add(r21:20, r31:30):raw:lo +# CHECK: r17:16 = add(r21:20,r31:30):raw:lo 0xf0 0xde 0x74 0xd3 -# CHECK: r17:16 = add(r21:20, r31:30):raw:hi +# CHECK: r17:16 = add(r21:20,r31:30):raw:hi # Add halfword 0x11 0xd5 0x1f 0xd5 -# CHECK: r17 = add(r21.l, r31.l) +# CHECK: r17 = add(r21.l,r31.l) 0x51 0xd5 0x1f 0xd5 -# CHECK: r17 = add(r21.l, r31.h) +# CHECK: r17 = add(r21.l,r31.h) 0x91 0xd5 0x1f 0xd5 -# CHECK: r17 = add(r21.l, r31.l):sat +# CHECK: r17 = add(r21.l,r31.l):sat 0xd1 0xd5 0x1f 0xd5 -# CHECK: r17 = add(r21.l, r31.h):sat +# CHECK: r17 = add(r21.l,r31.h):sat 0x11 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.l, r31.l):<<16 +# CHECK: r17 = add(r21.l,r31.l):<<16 0x31 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.l, r31.h):<<16 +# CHECK: r17 = add(r21.l,r31.h):<<16 0x51 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.h, r31.l):<<16 +# CHECK: r17 = add(r21.h,r31.l):<<16 0x71 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.h, r31.h):<<16 +# CHECK: r17 = add(r21.h,r31.h):<<16 0x91 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.l, r31.l):sat:<<16 +# CHECK: r17 = add(r21.l,r31.l):sat:<<16 0xb1 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.l, r31.h):sat:<<16 +# CHECK: r17 = add(r21.l,r31.h):sat:<<16 0xd1 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.h, r31.l):sat:<<16 +# CHECK: r17 = add(r21.h,r31.l):sat:<<16 0xf1 0xd5 0x5f 0xd5 -# CHECK: r17 = add(r21.h, r31.h):sat:<<16 +# CHECK: r17 = add(r21.h,r31.h):sat:<<16 # Add or subtract doublewords with carry 0x70 0xde 0xd4 0xc2 -# CHECK: r17:16 = add(r21:20, r31:30, p3):carry +# CHECK: r17:16 = add(r21:20,r31:30,p3):carry 0x70 0xde 0xf4 0xc2 -# CHECK: r17:16 = sub(r21:20, r31:30, p3):carry +# CHECK: r17:16 = sub(r21:20,r31:30,p3):carry # Logical doublewords 0x90 0xc0 0x94 0x80 # CHECK: r17:16 = not(r21:20) 0x10 0xde 0xf4 0xd3 -# CHECK: r17:16 = and(r21:20, r31:30) +# CHECK: r17:16 = and(r21:20,r31:30) 0x30 0xd4 0xfe 0xd3 -# CHECK: r17:16 = and(r21:20, ~r31:30) +# CHECK: r17:16 = and(r21:20,~r31:30) 0x50 0xde 0xf4 0xd3 -# CHECK: r17:16 = or(r21:20, r31:30) +# CHECK: r17:16 = or(r21:20,r31:30) 0x70 0xd4 0xfe 0xd3 -# CHECK: r17:16 = or(r21:20, ~r31:30) +# CHECK: r17:16 = or(r21:20,~r31:30) 0x90 0xde 0xf4 0xd3 -# CHECK: r17:16 = xor(r21:20, r31:30) +# CHECK: r17:16 = xor(r21:20,r31:30) # Logical-logical doublewords 0x10 0xde 0x94 0xca -# CHECK: r17:16 ^= xor(r21:20, r31:30) +# CHECK: r17:16 ^= xor(r21:20,r31:30) # Logical-logical words 0xf1 0xc3 0x15 0xda -# CHECK: r17 |= and(r21, #31) +# CHECK: r17 |= and(r21,#31) 0xf5 0xc3 0x51 0xda -# CHECK: r17 = or(r21, and(r17, #31)) +# CHECK: r17 = or(r21,and(r17,#31)) 0xf1 0xc3 0x95 0xda -# CHECK: r17 |= or(r21, #31) +# CHECK: r17 |= or(r21,#31) 0x11 0xdf 0x35 0xef -# CHECK: r17 |= and(r21, ~r31) +# CHECK: r17 |= and(r21,~r31) 0x31 0xdf 0x35 0xef -# CHECK: r17 &= and(r21, ~r31) +# CHECK: r17 &= and(r21,~r31) 0x51 0xdf 0x35 0xef -# CHECK: r17 ^= and(r21, ~r31) +# CHECK: r17 ^= and(r21,~r31) 0x11 0xdf 0x55 0xef -# CHECK: r17 &= and(r21, r31) +# CHECK: r17 &= and(r21,r31) 0x31 0xdf 0x55 0xef -# CHECK: r17 &= or(r21, r31) +# CHECK: r17 &= or(r21,r31) 0x51 0xdf 0x55 0xef -# CHECK: r17 &= xor(r21, r31) +# CHECK: r17 &= xor(r21,r31) 0x71 0xdf 0x55 0xef -# CHECK: r17 |= and(r21, r31) +# CHECK: r17 |= and(r21,r31) 0x71 0xdf 0x95 0xef -# CHECK: r17 ^= xor(r21, r31) +# CHECK: r17 ^= xor(r21,r31) 0x11 0xdf 0xd5 0xef -# CHECK: r17 |= or(r21, r31) +# CHECK: r17 |= or(r21,r31) 0x31 0xdf 0xd5 0xef -# CHECK: r17 |= xor(r21, r31) +# CHECK: r17 |= xor(r21,r31) 0x51 0xdf 0xd5 0xef -# CHECK: r17 ^= and(r21, r31) +# CHECK: r17 ^= and(r21,r31) 0x71 0xdf 0xd5 0xef -# CHECK: r17 ^= or(r21, r31) +# CHECK: r17 ^= or(r21,r31) # Maximum words 0x11 0xdf 0xd5 0xd5 -# CHECK: r17 = max(r21, r31) +# CHECK: r17 = max(r21,r31) 0x91 0xdf 0xd5 0xd5 -# CHECK: r17 = maxu(r21, r31) +# CHECK: r17 = maxu(r21,r31) # Maximum doublewords 0x90 0xde 0xd4 0xd3 -# CHECK: r17:16 = max(r21:20, r31:30) +# CHECK: r17:16 = max(r21:20,r31:30) 0xb0 0xde 0xd4 0xd3 -# CHECK: r17:16 = maxu(r21:20, r31:30) +# CHECK: r17:16 = maxu(r21:20,r31:30) # Minimum words 0x11 0xd5 0xbf 0xd5 -# CHECK: r17 = min(r21, r31) +# CHECK: r17 = min(r21,r31) 0x91 0xd5 0xbf 0xd5 -# CHECK: r17 = minu(r21, r31) +# CHECK: r17 = minu(r21,r31) # Minimum doublewords 0xd0 0xd4 0xbe 0xd3 -# CHECK: r17:16 = min(r21:20, r31:30) +# CHECK: r17:16 = min(r21:20,r31:30) 0xf0 0xd4 0xbe 0xd3 -# CHECK: r17:16 = minu(r21:20, r31:30) +# CHECK: r17:16 = minu(r21:20,r31:30) # Module wrap 0xf1 0xdf 0xf5 0xd3 -# CHECK: r17 = modwrap(r21, r31) +# CHECK: r17 = modwrap(r21,r31) # Negate 0xb0 0xc0 0x94 0x80 @@ -153,51 +153,51 @@ 0x31 0xc0 0xd4 0x88 # CHECK: r17 = round(r21:20):sat 0x11 0xdf 0xf5 0x8c -# CHECK: r17 = cround(r21, #31) +# CHECK: r17 = cround(r21,#31) 0x91 0xdf 0xf5 0x8c -# CHECK: r17 = round(r21, #31) +# CHECK: r17 = round(r21,#31) 0xd1 0xdf 0xf5 0x8c -# CHECK: r17 = round(r21, #31):sat +# CHECK: r17 = round(r21,#31):sat 0x11 0xdf 0xd5 0xc6 -# CHECK: r17 = cround(r21, r31) +# CHECK: r17 = cround(r21,r31) 0x91 0xdf 0xd5 0xc6 -# CHECK: r17 = round(r21, r31) +# CHECK: r17 = round(r21,r31) 0xd1 0xdf 0xd5 0xc6 -# CHECK: r17 = round(r21, r31):sat +# CHECK: r17 = round(r21,r31):sat # Subtract doublewords 0xf0 0xd4 0x3e 0xd3 -# CHECK: r17:16 = sub(r21:20, r31:30) +# CHECK: r17:16 = sub(r21:20,r31:30) # Subtract and accumulate words 0x71 0xd5 0x1f 0xef -# CHECK: r17 += sub(r21, r31) +# CHECK: r17 += sub(r21,r31) # Subtract halfword 0x11 0xd5 0x3f 0xd5 -# CHECK: r17 = sub(r21.l, r31.l) +# CHECK: r17 = sub(r21.l,r31.l) 0x51 0xd5 0x3f 0xd5 -# CHECK: r17 = sub(r21.l, r31.h) +# CHECK: r17 = sub(r21.l,r31.h) 0x91 0xd5 0x3f 0xd5 -# CHECK: r17 = sub(r21.l, r31.l):sat +# CHECK: r17 = sub(r21.l,r31.l):sat 0xd1 0xd5 0x3f 0xd5 -# CHECK: r17 = sub(r21.l, r31.h):sat +# CHECK: r17 = sub(r21.l,r31.h):sat 0x11 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.l, r31.l):<<16 +# CHECK: r17 = sub(r21.l,r31.l):<<16 0x31 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.l, r31.h):<<16 +# CHECK: r17 = sub(r21.l,r31.h):<<16 0x51 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.h, r31.l):<<16 +# CHECK: r17 = sub(r21.h,r31.l):<<16 0x71 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.h, r31.h):<<16 +# CHECK: r17 = sub(r21.h,r31.h):<<16 0x91 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.l, r31.l):sat:<<16 +# CHECK: r17 = sub(r21.l,r31.l):sat:<<16 0xb1 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.l, r31.h):sat:<<16 +# CHECK: r17 = sub(r21.l,r31.h):sat:<<16 0xd1 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.h, r31.l):sat:<<16 +# CHECK: r17 = sub(r21.h,r31.l):sat:<<16 0xf1 0xd5 0x7f 0xd5 -# CHECK: r17 = sub(r21.h, r31.h):sat:<<16 +# CHECK: r17 = sub(r21.h,r31.h):sat:<<16 # Sign extend word to doubleword 0x10 0xc0 0x55 0x84 @@ -217,179 +217,179 @@ # Vector absolute difference halfwords 0x10 0xd4 0x7e 0xe8 -# CHECK: r17:16 = vabsdiffh(r21:20, r31:30) +# CHECK: r17:16 = vabsdiffh(r21:20,r31:30) # Vector absolute difference words 0x10 0xd4 0x3e 0xe8 -# CHECK: r17:16 = vabsdiffw(r21:20, r31:30) +# CHECK: r17:16 = vabsdiffw(r21:20,r31:30) # Vector add halfwords 0x50 0xde 0x14 0xd3 -# CHECK: r17:16 = vaddh(r21:20, r31:30) +# CHECK: r17:16 = vaddh(r21:20,r31:30) 0x70 0xde 0x14 0xd3 -# CHECK: r17:16 = vaddh(r21:20, r31:30):sat +# CHECK: r17:16 = vaddh(r21:20,r31:30):sat 0x90 0xde 0x14 0xd3 -# CHECK: r17:16 = vadduh(r21:20, r31:30):sat +# CHECK: r17:16 = vadduh(r21:20,r31:30):sat # Vector add halfwords with saturate and pack to unsigned bytes 0x31 0xde 0x54 0xc1 -# CHECK: r17 = vaddhub(r21:20, r31:30):sat +# CHECK: r17 = vaddhub(r21:20,r31:30):sat # Vector reduce add unsigned bytes 0x30 0xde 0x54 0xe8 -# CHECK: r17:16 = vraddub(r21:20, r31:30) +# CHECK: r17:16 = vraddub(r21:20,r31:30) 0x30 0xde 0x54 0xea -# CHECK: r17:16 += vraddub(r21:20, r31:30) +# CHECK: r17:16 += vraddub(r21:20,r31:30) # Vector reduce add halfwords 0x31 0xde 0x14 0xe9 -# CHECK: r17 = vradduh(r21:20, r31:30) +# CHECK: r17 = vradduh(r21:20,r31:30) 0xf1 0xde 0x34 0xe9 -# CHECK: r17 = vraddh(r21:20, r31:30) +# CHECK: r17 = vraddh(r21:20,r31:30) # Vector add bytes 0x10 0xde 0x14 0xd3 -# CHECK: r17:16 = vaddub(r21:20, r31:30) +# CHECK: r17:16 = vaddub(r21:20,r31:30) 0x30 0xde 0x14 0xd3 -# CHECK: r17:16 = vaddub(r21:20, r31:30):sat +# CHECK: r17:16 = vaddub(r21:20,r31:30):sat # Vector add words 0xb0 0xde 0x14 0xd3 -# CHECK: r17:16 = vaddw(r21:20, r31:30) +# CHECK: r17:16 = vaddw(r21:20,r31:30) 0xd0 0xde 0x14 0xd3 -# CHECK: r17:16 = vaddw(r21:20, r31:30):sat +# CHECK: r17:16 = vaddw(r21:20,r31:30):sat # Vector average halfwords 0x50 0xde 0x54 0xd3 -# CHECK: r17:16 = vavgh(r21:20, r31:30) +# CHECK: r17:16 = vavgh(r21:20,r31:30) 0x70 0xde 0x54 0xd3 -# CHECK: r17:16 = vavgh(r21:20, r31:30):rnd +# CHECK: r17:16 = vavgh(r21:20,r31:30):rnd 0x90 0xde 0x54 0xd3 -# CHECK: r17:16 = vavgh(r21:20, r31:30):crnd +# CHECK: r17:16 = vavgh(r21:20,r31:30):crnd 0xb0 0xde 0x54 0xd3 -# CHECK: r17:16 = vavguh(r21:20, r31:30) +# CHECK: r17:16 = vavguh(r21:20,r31:30) 0xd0 0xde 0x54 0xd3 -# CHECK: r17:16 = vavguh(r21:20, r31:30):rnd +# CHECK: r17:16 = vavguh(r21:20,r31:30):rnd 0x10 0xd4 0x9e 0xd3 -# CHECK: r17:16 = vnavgh(r21:20, r31:30) +# CHECK: r17:16 = vnavgh(r21:20,r31:30) 0x30 0xd4 0x9e 0xd3 -# CHECK: r17:16 = vnavgh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 = vnavgh(r21:20,r31:30):rnd:sat 0x50 0xd4 0x9e 0xd3 -# CHECK: r17:16 = vnavgh(r21:20, r31:30):crnd:sat +# CHECK: r17:16 = vnavgh(r21:20,r31:30):crnd:sat # Vector average unsigned bytes 0x10 0xde 0x54 0xd3 -# CHECK: r17:16 = vavgub(r21:20, r31:30) +# CHECK: r17:16 = vavgub(r21:20,r31:30) 0x30 0xde 0x54 0xd3 -# CHECK: r17:16 = vavgub(r21:20, r31:30):rnd +# CHECK: r17:16 = vavgub(r21:20,r31:30):rnd # Vector average words 0x10 0xde 0x74 0xd3 -# CHECK: r17:16 = vavgw(r21:20, r31:30) +# CHECK: r17:16 = vavgw(r21:20,r31:30) 0x30 0xde 0x74 0xd3 -# CHECK: r17:16 = vavgw(r21:20, r31:30):rnd +# CHECK: r17:16 = vavgw(r21:20,r31:30):rnd 0x50 0xde 0x74 0xd3 -# CHECK: r17:16 = vavgw(r21:20, r31:30):crnd +# CHECK: r17:16 = vavgw(r21:20,r31:30):crnd 0x70 0xde 0x74 0xd3 -# CHECK: r17:16 = vavguw(r21:20, r31:30) +# CHECK: r17:16 = vavguw(r21:20,r31:30) 0x90 0xde 0x74 0xd3 -# CHECK: r17:16 = vavguw(r21:20, r31:30):rnd +# CHECK: r17:16 = vavguw(r21:20,r31:30):rnd 0x70 0xd4 0x9e 0xd3 -# CHECK: r17:16 = vnavgw(r21:20, r31:30) +# CHECK: r17:16 = vnavgw(r21:20,r31:30) 0x90 0xd4 0x9e 0xd3 -# CHECK: r17:16 = vnavgw(r21:20, r31:30):rnd:sat +# CHECK: r17:16 = vnavgw(r21:20,r31:30):rnd:sat 0xd0 0xd4 0x9e 0xd3 -# CHECK: r17:16 = vnavgw(r21:20, r31:30):crnd:sat +# CHECK: r17:16 = vnavgw(r21:20,r31:30):crnd:sat # Vector conditional negate 0x50 0xdf 0xd4 0xc3 -# CHECK: r17:16 = vcnegh(r21:20, r31) +# CHECK: r17:16 = vcnegh(r21:20,r31) 0xf0 0xff 0x34 0xcb -# CHECK: r17:16 += vrcnegh(r21:20, r31) +# CHECK: r17:16 += vrcnegh(r21:20,r31) # Vector maximum bytes 0x10 0xd4 0xde 0xd3 -# CHECK: r17:16 = vmaxub(r21:20, r31:30) +# CHECK: r17:16 = vmaxub(r21:20,r31:30) 0xd0 0xd4 0xde 0xd3 -# CHECK: r17:16 = vmaxb(r21:20, r31:30) +# CHECK: r17:16 = vmaxb(r21:20,r31:30) # Vector maximum halfwords 0x30 0xd4 0xde 0xd3 -# CHECK: r17:16 = vmaxh(r21:20, r31:30) +# CHECK: r17:16 = vmaxh(r21:20,r31:30) 0x50 0xd4 0xde 0xd3 -# CHECK: r17:16 = vmaxuh(r21:20, r31:30) +# CHECK: r17:16 = vmaxuh(r21:20,r31:30) # Vector reduce maximum halfwords 0x3f 0xd0 0x34 0xcb -# CHECK: r17:16 = vrmaxh(r21:20, r31) +# CHECK: r17:16 = vrmaxh(r21:20,r31) 0x3f 0xf0 0x34 0xcb -# CHECK: r17:16 = vrmaxuh(r21:20, r31) +# CHECK: r17:16 = vrmaxuh(r21:20,r31) # Vector reduce maximum words 0x5f 0xd0 0x34 0xcb -# CHECK: r17:16 = vrmaxw(r21:20, r31) +# CHECK: r17:16 = vrmaxw(r21:20,r31) 0x5f 0xf0 0x34 0xcb -# CHECK: r17:16 = vrmaxuw(r21:20, r31) +# CHECK: r17:16 = vrmaxuw(r21:20,r31) # Vector maximum words 0xb0 0xd4 0xbe 0xd3 -# CHECK: r17:16 = vmaxuw(r21:20, r31:30) +# CHECK: r17:16 = vmaxuw(r21:20,r31:30) 0x70 0xd4 0xde 0xd3 -# CHECK: r17:16 = vmaxw(r21:20, r31:30) +# CHECK: r17:16 = vmaxw(r21:20,r31:30) # Vector minimum bytes 0x10 0xd4 0xbe 0xd3 -# CHECK: r17:16 = vminub(r21:20, r31:30) +# CHECK: r17:16 = vminub(r21:20,r31:30) 0xf0 0xd4 0xde 0xd3 -# CHECK: r17:16 = vminb(r21:20, r31:30) +# CHECK: r17:16 = vminb(r21:20,r31:30) # Vector minimum halfwords 0x30 0xd4 0xbe 0xd3 -# CHECK: r17:16 = vminh(r21:20, r31:30) +# CHECK: r17:16 = vminh(r21:20,r31:30) 0x50 0xd4 0xbe 0xd3 -# CHECK: r17:16 = vminuh(r21:20, r31:30) +# CHECK: r17:16 = vminuh(r21:20,r31:30) # Vector reduce minimum halfwords 0xbf 0xd0 0x34 0xcb -# CHECK: r17:16 = vrminh(r21:20, r31) +# CHECK: r17:16 = vrminh(r21:20,r31) 0xbf 0xf0 0x34 0xcb -# CHECK: r17:16 = vrminuh(r21:20, r31) +# CHECK: r17:16 = vrminuh(r21:20,r31) # Vector reduce minimum words 0xdf 0xd0 0x34 0xcb -# CHECK: r17:16 = vrminw(r21:20, r31) +# CHECK: r17:16 = vrminw(r21:20,r31) 0xdf 0xf0 0x34 0xcb -# CHECK: r17:16 = vrminuw(r21:20, r31) +# CHECK: r17:16 = vrminuw(r21:20,r31) # Vector minimum words 0x70 0xd4 0xbe 0xd3 -# CHECK: r17:16 = vminw(r21:20, r31:30) +# CHECK: r17:16 = vminw(r21:20,r31:30) 0x90 0xd4 0xbe 0xd3 -# CHECK: r17:16 = vminuw(r21:20, r31:30) +# CHECK: r17:16 = vminuw(r21:20,r31:30) # Vector sum of absolute differences unsigned bytes 0x50 0xde 0x54 0xe8 -# CHECK: r17:16 = vrsadub(r21:20, r31:30) +# CHECK: r17:16 = vrsadub(r21:20,r31:30) 0x50 0xde 0x54 0xea -# CHECK: r17:16 += vrsadub(r21:20, r31:30) +# CHECK: r17:16 += vrsadub(r21:20,r31:30) # Vector subtract halfwords 0x50 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubh(r21:20, r31:30) +# CHECK: r17:16 = vsubh(r21:20,r31:30) 0x70 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubh(r21:20, r31:30):sat +# CHECK: r17:16 = vsubh(r21:20,r31:30):sat 0x90 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubuh(r21:20, r31:30):sat +# CHECK: r17:16 = vsubuh(r21:20,r31:30):sat # Vector subtract bytes 0x10 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubub(r21:20, r31:30) +# CHECK: r17:16 = vsubub(r21:20,r31:30) 0x30 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubub(r21:20, r31:30):sat +# CHECK: r17:16 = vsubub(r21:20,r31:30):sat # Vector subtract words 0xb0 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubw(r21:20, r31:30) +# CHECK: r17:16 = vsubw(r21:20,r31:30) 0xd0 0xd4 0x3e 0xd3 -# CHECK: r17:16 = vsubw(r21:20, r31:30):sat +# CHECK: r17:16 = vsubw(r21:20,r31:30):sat diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt index 89b6906afa9..490a8bf8502 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt @@ -11,9 +11,9 @@ 0x11 0xc0 0x74 0x88 # CHECK: r17 = normamt(r21:20) 0x51 0xd7 0x74 0x88 -# CHECK: r17 = add(clb(r21:20), #23) +# CHECK: r17 = add(clb(r21:20),#23) 0x11 0xd7 0x35 0x8c -# CHECK: r17 = add(clb(r21), #23) +# CHECK: r17 = add(clb(r21),#23) 0x91 0xc0 0x15 0x8c # CHECK: r17 = clb(r21) 0xb1 0xc0 0x15 0x8c @@ -39,31 +39,31 @@ # Extract bitfield 0xf0 0xdf 0x54 0x81 -# CHECK: r17:16 = extractu(r21:20, #31, #23) +# CHECK: r17:16 = extractu(r21:20,#31,#23) 0xf0 0xdf 0x54 0x8a -# CHECK: r17:16 = extract(r21:20, #31, #23) +# CHECK: r17:16 = extract(r21:20,#31,#23) 0xf1 0xdf 0x55 0x8d -# CHECK: r17 = extractu(r21, #31, #23) +# CHECK: r17 = extractu(r21,#31,#23) 0xf1 0xdf 0xd5 0x8d -# CHECK: r17 = extract(r21, #31, #23) +# CHECK: r17 = extract(r21,#31,#23) 0x10 0xde 0x14 0xc1 -# CHECK: r17:16 = extractu(r21:20, r31:30) +# CHECK: r17:16 = extractu(r21:20,r31:30) 0x90 0xde 0xd4 0xc1 -# CHECK: r17:16 = extract(r21:20, r31:30) +# CHECK: r17:16 = extract(r21:20,r31:30) 0x11 0xde 0x15 0xc9 -# CHECK: r17 = extractu(r21, r31:30) +# CHECK: r17 = extractu(r21,r31:30) 0x51 0xde 0x15 0xc9 -# CHECK: r17 = extract(r21, r31:30) +# CHECK: r17 = extract(r21,r31:30) # Insert bitfield 0xf0 0xdf 0x54 0x83 -# CHECK: r17:16 = insert(r21:20, #31, #23) +# CHECK: r17:16 = insert(r21:20,#31,#23) 0xf1 0xdf 0x55 0x8f -# CHECK: r17 = insert(r21, #31, #23) +# CHECK: r17 = insert(r21,#31,#23) 0x11 0xde 0x15 0xc8 -# CHECK: r17 = insert(r21, r31:30) +# CHECK: r17 = insert(r21,r31:30) 0x10 0xde 0x14 0xca -# CHECK: r17:16 = insert(r21:20, r31:30) +# CHECK: r17:16 = insert(r21:20,r31:30) # Interleave/deinterleave 0x90 0xc0 0xd4 0x80 @@ -73,13 +73,13 @@ # Linear feedback-shift iteration 0xd0 0xde 0x94 0xc1 -# CHECK: r17:16 = lfs(r21:20, r31:30) +# CHECK: r17:16 = lfs(r21:20,r31:30) # Masked parity 0x11 0xde 0x14 0xd0 -# CHECK: r17 = parity(r21:20, r31:30) +# CHECK: r17 = parity(r21:20,r31:30) 0x11 0xdf 0xf5 0xd5 -# CHECK: r17 = parity(r21, r31) +# CHECK: r17 = parity(r21,r31) # Bit reverse 0xd0 0xc0 0xd4 0x80 @@ -89,30 +89,30 @@ # Set/clear/toggle bit 0x11 0xdf 0xd5 0x8c -# CHECK: r17 = setbit(r21, #31) +# CHECK: r17 = setbit(r21,#31) 0x31 0xdf 0xd5 0x8c -# CHECK: r17 = clrbit(r21, #31) +# CHECK: r17 = clrbit(r21,#31) 0x51 0xdf 0xd5 0x8c -# CHECK: r17 = togglebit(r21, #31) +# CHECK: r17 = togglebit(r21,#31) 0x11 0xdf 0x95 0xc6 -# CHECK: r17 = setbit(r21, r31) +# CHECK: r17 = setbit(r21,r31) 0x51 0xdf 0x95 0xc6 -# CHECK: r17 = clrbit(r21, r31) +# CHECK: r17 = clrbit(r21,r31) 0x91 0xdf 0x95 0xc6 -# CHECK: r17 = togglebit(r21, r31) +# CHECK: r17 = togglebit(r21,r31) # Split bitfield 0x90 0xdf 0xd5 0x88 -# CHECK: r17:16 = bitsplit(r21, #31) +# CHECK: r17:16 = bitsplit(r21,#31) 0x10 0xdf 0x35 0xd4 -# CHECK: r17:16 = bitsplit(r21, r31) +# CHECK: r17:16 = bitsplit(r21,r31) # Table index 0xf1 0xcd 0x15 0x87 -# CHECK: r17 = tableidxb(r21, #7, #13):raw +# CHECK: r17 = tableidxb(r21,#7,#13):raw 0xf1 0xcd 0x55 0x87 -# CHECK: r17 = tableidxh(r21, #7, #13):raw +# CHECK: r17 = tableidxh(r21,#7,#13):raw 0xf1 0xcd 0x95 0x87 -# CHECK: r17 = tableidxw(r21, #7, #13):raw +# CHECK: r17 = tableidxw(r21,#7,#13):raw 0xf1 0xcd 0xd5 0x87 -# CHECK: r17 = tableidxd(r21, #7, #13):raw +# CHECK: r17 = tableidxd(r21,#7,#13):raw diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_complex.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_complex.txt index 2332082d835..2c604f37d2e 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_complex.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_complex.txt @@ -3,89 +3,89 @@ # Complex add/sub halfwords 0x90 0xde 0x54 0xc1 -# CHECK: r17:16 = vxaddsubh(r21:20, r31:30):sat +# CHECK: r17:16 = vxaddsubh(r21:20,r31:30):sat 0xd0 0xde 0x54 0xc1 -# CHECK: r17:16 = vxsubaddh(r21:20, r31:30):sat +# CHECK: r17:16 = vxsubaddh(r21:20,r31:30):sat 0x10 0xde 0xd4 0xc1 -# CHECK: r17:16 = vxaddsubh(r21:20, r31:30):rnd:>>1:sat +# CHECK: r17:16 = vxaddsubh(r21:20,r31:30):rnd:>>1:sat 0x50 0xde 0xd4 0xc1 -# CHECK: r17:16 = vxsubaddh(r21:20, r31:30):rnd:>>1:sat +# CHECK: r17:16 = vxsubaddh(r21:20,r31:30):rnd:>>1:sat # Complex add/sub words 0x10 0xde 0x54 0xc1 -# CHECK: r17:16 = vxaddsubw(r21:20, r31:30):sat +# CHECK: r17:16 = vxaddsubw(r21:20,r31:30):sat 0x50 0xde 0x54 0xc1 -# CHECK: r17:16 = vxsubaddw(r21:20, r31:30):sat +# CHECK: r17:16 = vxsubaddw(r21:20,r31:30):sat # Complex multiply 0xd0 0xdf 0x15 0xe5 -# CHECK: r17:16 = cmpy(r21, r31):sat +# CHECK: r17:16 = cmpy(r21,r31):sat 0xd0 0xdf 0x95 0xe5 -# CHECK: r17:16 = cmpy(r21, r31):<<1:sat +# CHECK: r17:16 = cmpy(r21,r31):<<1:sat 0xd0 0xdf 0x55 0xe5 -# CHECK: r17:16 = cmpy(r21, r31*):sat +# CHECK: r17:16 = cmpy(r21,r31*):sat 0xd0 0xdf 0xd5 0xe5 -# CHECK: r17:16 = cmpy(r21, r31*):<<1:sat +# CHECK: r17:16 = cmpy(r21,r31*):<<1:sat 0xd0 0xdf 0x15 0xe7 -# CHECK: r17:16 += cmpy(r21, r31):sat +# CHECK: r17:16 += cmpy(r21,r31):sat 0xd0 0xdf 0x95 0xe7 -# CHECK: r17:16 += cmpy(r21, r31):<<1:sat +# CHECK: r17:16 += cmpy(r21,r31):<<1:sat 0xf0 0xdf 0x15 0xe7 -# CHECK: r17:16 -= cmpy(r21, r31):sat +# CHECK: r17:16 -= cmpy(r21,r31):sat 0xf0 0xdf 0x95 0xe7 -# CHECK: r17:16 -= cmpy(r21, r31):<<1:sat +# CHECK: r17:16 -= cmpy(r21,r31):<<1:sat 0xd0 0xdf 0x55 0xe7 -# CHECK: r17:16 += cmpy(r21, r31*):sat +# CHECK: r17:16 += cmpy(r21,r31*):sat 0xd0 0xdf 0xd5 0xe7 -# CHECK: r17:16 += cmpy(r21, r31*):<<1:sat +# CHECK: r17:16 += cmpy(r21,r31*):<<1:sat 0xf0 0xdf 0x55 0xe7 -# CHECK: r17:16 -= cmpy(r21, r31*):sat +# CHECK: r17:16 -= cmpy(r21,r31*):sat 0xf0 0xdf 0xd5 0xe7 -# CHECK: r17:16 -= cmpy(r21, r31*):<<1:sat +# CHECK: r17:16 -= cmpy(r21,r31*):<<1:sat # Complex multiply real or imaginary 0x30 0xdf 0x15 0xe5 -# CHECK: r17:16 = cmpyi(r21, r31) +# CHECK: r17:16 = cmpyi(r21,r31) 0x50 0xdf 0x15 0xe5 -# CHECK: r17:16 = cmpyr(r21, r31) +# CHECK: r17:16 = cmpyr(r21,r31) 0x30 0xdf 0x15 0xe7 -# CHECK: r17:16 += cmpyi(r21, r31) +# CHECK: r17:16 += cmpyi(r21,r31) 0x50 0xdf 0x15 0xe7 -# CHECK: r17:16 += cmpyr(r21, r31) +# CHECK: r17:16 += cmpyr(r21,r31) # Complex multiply with round and pack 0xd1 0xdf 0x35 0xed -# CHECK: r17 = cmpy(r21, r31):rnd:sat +# CHECK: r17 = cmpy(r21,r31):rnd:sat 0xd1 0xdf 0xb5 0xed -# CHECK: r17 = cmpy(r21, r31):<<1:rnd:sat +# CHECK: r17 = cmpy(r21,r31):<<1:rnd:sat 0xd1 0xdf 0x75 0xed -# CHECK: r17 = cmpy(r21, r31*):rnd:sat +# CHECK: r17 = cmpy(r21,r31*):rnd:sat 0xd1 0xdf 0xf5 0xed -# CHECK: r17 = cmpy(r21, r31*):<<1:rnd:sat +# CHECK: r17 = cmpy(r21,r31*):<<1:rnd:sat # Complex multiply 32x16 0x91 0xdf 0x14 0xc5 -# CHECK: r17 = cmpyiwh(r21:20, r31):<<1:rnd:sat +# CHECK: r17 = cmpyiwh(r21:20,r31):<<1:rnd:sat 0xb1 0xdf 0x14 0xc5 -# CHECK: r17 = cmpyiwh(r21:20, r31*):<<1:rnd:sat +# CHECK: r17 = cmpyiwh(r21:20,r31*):<<1:rnd:sat 0xd1 0xdf 0x14 0xc5 -# CHECK: r17 = cmpyrwh(r21:20, r31):<<1:rnd:sat +# CHECK: r17 = cmpyrwh(r21:20,r31):<<1:rnd:sat 0xf1 0xdf 0x14 0xc5 -# CHECK: r17 = cmpyrwh(r21:20, r31*):<<1:rnd:sat +# CHECK: r17 = cmpyrwh(r21:20,r31*):<<1:rnd:sat # Vector complex multiply real or imaginary 0xd0 0xde 0x34 0xe8 -# CHECK: r17:16 = vcmpyr(r21:20, r31:30):sat +# CHECK: r17:16 = vcmpyr(r21:20,r31:30):sat 0xd0 0xde 0xb4 0xe8 -# CHECK: r17:16 = vcmpyr(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vcmpyr(r21:20,r31:30):<<1:sat 0xd0 0xde 0x54 0xe8 -# CHECK: r17:16 = vcmpyi(r21:20, r31:30):sat +# CHECK: r17:16 = vcmpyi(r21:20,r31:30):sat 0xd0 0xde 0xd4 0xe8 -# CHECK: r17:16 = vcmpyi(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vcmpyi(r21:20,r31:30):<<1:sat 0x90 0xde 0x34 0xea -# CHECK: r17:16 += vcmpyr(r21:20, r31:30):sat +# CHECK: r17:16 += vcmpyr(r21:20,r31:30):sat 0x90 0xde 0x54 0xea -# CHECK: r17:16 += vcmpyi(r21:20, r31:30):sat +# CHECK: r17:16 += vcmpyi(r21:20,r31:30):sat # Vector complex conjugate 0xf0 0xc0 0x94 0x80 @@ -93,36 +93,36 @@ # Vector complex rotate 0x10 0xdf 0xd4 0xc3 -# CHECK: r17:16 = vcrotate(r21:20, r31) +# CHECK: r17:16 = vcrotate(r21:20,r31) # Vector reduce complex multiply real or imaginary 0x10 0xde 0x14 0xe8 -# CHECK: r17:16 = vrcmpyi(r21:20, r31:30) +# CHECK: r17:16 = vrcmpyi(r21:20,r31:30) 0x30 0xde 0x14 0xe8 -# CHECK: r17:16 = vrcmpyr(r21:20, r31:30) +# CHECK: r17:16 = vrcmpyr(r21:20,r31:30) 0x10 0xde 0x54 0xe8 -# CHECK: r17:16 = vrcmpyi(r21:20, r31:30*) +# CHECK: r17:16 = vrcmpyi(r21:20,r31:30*) 0x30 0xde 0x74 0xe8 -# CHECK: r17:16 = vrcmpyr(r21:20, r31:30*) +# CHECK: r17:16 = vrcmpyr(r21:20,r31:30*) # Vector reduce complex multiply by scalar 0x90 0xde 0xb4 0xe8 -# CHECK: r17:16 = vrcmpys(r21:20, r31:30):<<1:sat:raw:hi +# CHECK: r17:16 = vrcmpys(r21:20,r31:30):<<1:sat:raw:hi 0x90 0xde 0xf4 0xe8 -# CHECK: r17:16 = vrcmpys(r21:20, r31:30):<<1:sat:raw:lo +# CHECK: r17:16 = vrcmpys(r21:20,r31:30):<<1:sat:raw:lo 0x90 0xde 0xb4 0xea -# CHECK: r17:16 += vrcmpys(r21:20, r31:30):<<1:sat:raw:hi +# CHECK: r17:16 += vrcmpys(r21:20,r31:30):<<1:sat:raw:hi 0x90 0xde 0xf4 0xea -# CHECK: r17:16 += vrcmpys(r21:20, r31:30):<<1:sat:raw:lo +# CHECK: r17:16 += vrcmpys(r21:20,r31:30):<<1:sat:raw:lo # Vector reduce complex multiply by scalar with round and pack 0xd1 0xde 0xb4 0xe9 -# CHECK: r17 = vrcmpys(r21:20, r31:30):<<1:rnd:sat:raw:hi +# CHECK: r17 = vrcmpys(r21:20,r31:30):<<1:rnd:sat:raw:hi 0xf1 0xde 0xb4 0xe9 -# CHECK: r17 = vrcmpys(r21:20, r31:30):<<1:rnd:sat:raw:lo +# CHECK: r17 = vrcmpys(r21:20,r31:30):<<1:rnd:sat:raw:lo # Vector reduce complex rotate 0xf0 0xff 0xd4 0xc3 -# CHECK: r17:16 = vrcrotate(r21:20, r31, #3) +# CHECK: r17:16 = vrcrotate(r21:20,r31,#3) 0x30 0xff 0xb4 0xcb -# CHECK: r17:16 += vrcrotate(r21:20, r31, #3) +# CHECK: r17:16 += vrcrotate(r21:20,r31,#3) diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_fp.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_fp.txt index 70074208eda..31f2a5330f2 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_fp.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_fp.txt @@ -3,31 +3,31 @@ # Floating point addition 0x11 0xdf 0x15 0xeb -# CHECK: r17 = sfadd(r21, r31) +# CHECK: r17 = sfadd(r21,r31) # Classify floating-point value 0x03 0xd5 0xf1 0x85 -# CHECK: p3 = sfclass(r17, #21) +# CHECK: p3 = sfclass(r17,#21) 0xb3 0xc2 0x90 0xdc -# CHECK: p3 = dfclass(r17:16, #21) +# CHECK: p3 = dfclass(r17:16,#21) # Compare floating-point value 0x03 0xd5 0xf1 0xc7 -# CHECK: p3 = sfcmp.ge(r17, r21) +# CHECK: p3 = sfcmp.ge(r17,r21) 0x23 0xd5 0xf1 0xc7 -# CHECK: p3 = sfcmp.uo(r17, r21) +# CHECK: p3 = sfcmp.uo(r17,r21) 0x63 0xd5 0xf1 0xc7 -# CHECK: p3 = sfcmp.eq(r17, r21) +# CHECK: p3 = sfcmp.eq(r17,r21) 0x83 0xd5 0xf1 0xc7 -# CHECK: p3 = sfcmp.gt(r17, r21) +# CHECK: p3 = sfcmp.gt(r17,r21) 0x03 0xd4 0xf0 0xd2 -# CHECK: p3 = dfcmp.eq(r17:16, r21:20) +# CHECK: p3 = dfcmp.eq(r17:16,r21:20) 0x23 0xd4 0xf0 0xd2 -# CHECK: p3 = dfcmp.gt(r17:16, r21:20) +# CHECK: p3 = dfcmp.gt(r17:16,r21:20) 0x43 0xd4 0xf0 0xd2 -# CHECK: p3 = dfcmp.ge(r17:16, r21:20) +# CHECK: p3 = dfcmp.ge(r17:16,r21:20) 0x63 0xd4 0xf0 0xd2 -# CHECK: p3 = dfcmp.uo(r17:16, r21:20) +# CHECK: p3 = dfcmp.uo(r17:16,r21:20) # Convert floating-point value to other format 0x10 0xc0 0x95 0x84 @@ -91,29 +91,29 @@ 0x11 0xc0 0xb5 0x8b # CHECK: r17 = sffixupr(r21) 0x11 0xdf 0xd5 0xeb -# CHECK: r17 = sffixupn(r21, r31) +# CHECK: r17 = sffixupn(r21,r31) 0x31 0xdf 0xd5 0xeb -# CHECK: r17 = sffixupd(r21, r31) +# CHECK: r17 = sffixupd(r21,r31) # Floating point fused multiply-add 0x91 0xdf 0x15 0xef -# CHECK: r17 += sfmpy(r21, r31) +# CHECK: r17 += sfmpy(r21,r31) 0xb1 0xdf 0x15 0xef -# CHECK: r17 -= sfmpy(r21, r31) +# CHECK: r17 -= sfmpy(r21,r31) # Floating point fused multiply-add with scaling 0xf1 0xdf 0x75 0xef -# CHECK: r17 += sfmpy(r21, r31, p3):scale +# CHECK: r17 += sfmpy(r21,r31,p3):scale # Floating point reciprocal square root approximation 0x71 0xc0 0xf5 0x8b -# CHECK: r17, p3 = sfinvsqrta(r21) +# CHECK: r17,p3 = sfinvsqrta(r21) # Floating point fused multiply-add for library routines 0xd1 0xdf 0x15 0xef -# CHECK: r17 += sfmpy(r21, r31):lib +# CHECK: r17 += sfmpy(r21,r31):lib 0xf1 0xdf 0x15 0xef -# CHECK: r17 -= sfmpy(r21, r31):lib +# CHECK: r17 -= sfmpy(r21,r31):lib # Create floating-point constant 0xb1 0xc2 0x00 0xd6 @@ -127,20 +127,20 @@ # Floating point maximum 0x11 0xdf 0x95 0xeb -# CHECK: r17 = sfmax(r21, r31) +# CHECK: r17 = sfmax(r21,r31) # Floating point minimum 0x31 0xdf 0x95 0xeb -# CHECK: r17 = sfmin(r21, r31) +# CHECK: r17 = sfmin(r21,r31) # Floating point multiply 0x11 0xdf 0x55 0xeb -# CHECK: r17 = sfmpy(r21, r31) +# CHECK: r17 = sfmpy(r21,r31) # Floating point reciprocal approximation 0xf1 0xdf 0xf5 0xeb -# CHECK: r17, p3 = sfrecipa(r21, r31) +# CHECK: r17,p3 = sfrecipa(r21,r31) # Floating point subtraction 0x31 0xdf 0x15 0xeb -# CHECK: r17 = sfsub(r21, r31) +# CHECK: r17 = sfsub(r21,r31) diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_mpy.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_mpy.txt index ada32162a81..dde6e76b266 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_mpy.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_mpy.txt @@ -3,398 +3,398 @@ # Multiply and use lower result 0xb1 0xdf 0x35 0xd7 -# CHECK: r17 = add(#21, mpyi(r21, r31)) +# CHECK: r17 = add(#21,mpyi(r21,r31)) 0xbf 0xd1 0x35 0xd8 -# CHECK: r17 = add(#21, mpyi(r21, #31)) +# CHECK: r17 = add(#21,mpyi(r21,#31)) 0xb5 0xd1 0x3f 0xdf -# CHECK: r17 = add(r21, mpyi(#84, r31)) +# CHECK: r17 = add(r21,mpyi(#84,r31)) 0xf5 0xf1 0xb5 0xdf -# CHECK: r17 = add(r21, mpyi(r21, #31)) +# CHECK: r17 = add(r21,mpyi(r21,#31)) 0x15 0xd1 0x1f 0xe3 -# CHECK: r17 = add(r21, mpyi(r17, r31)) +# CHECK: r17 = add(r21,mpyi(r17,r31)) 0xf1 0xc3 0x15 0xe0 -# CHECK: r17 =+ mpyi(r21, #31) +# CHECK: r17 = +mpyi(r21,#31) 0xf1 0xc3 0x95 0xe0 -# CHECK: r17 =- mpyi(r21, #31) +# CHECK: r17 = -mpyi(r21,#31) 0xf1 0xc3 0x15 0xe1 -# CHECK: r17 += mpyi(r21, #31) +# CHECK: r17 += mpyi(r21,#31) 0xf1 0xc3 0x95 0xe1 -# CHECK: r17 -= mpyi(r21, #31) +# CHECK: r17 -= mpyi(r21,#31) 0x11 0xdf 0x15 0xed -# CHECK: r17 = mpyi(r21, r31) +# CHECK: r17 = mpyi(r21,r31) 0x11 0xdf 0x15 0xef -# CHECK: r17 += mpyi(r21, r31) +# CHECK: r17 += mpyi(r21,r31) # Vector multiply word by signed half (32x16) 0xb0 0xde 0x14 0xe8 -# CHECK: r17:16 = vmpyweh(r21:20, r31:30):sat +# CHECK: r17:16 = vmpyweh(r21:20,r31:30):sat 0xb0 0xde 0x94 0xe8 -# CHECK: r17:16 = vmpyweh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vmpyweh(r21:20,r31:30):<<1:sat 0xf0 0xde 0x14 0xe8 -# CHECK: r17:16 = vmpywoh(r21:20, r31:30):sat +# CHECK: r17:16 = vmpywoh(r21:20,r31:30):sat 0xf0 0xde 0x94 0xe8 -# CHECK: r17:16 = vmpywoh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vmpywoh(r21:20,r31:30):<<1:sat 0xb0 0xde 0x34 0xe8 -# CHECK: r17:16 = vmpyweh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 = vmpyweh(r21:20,r31:30):rnd:sat 0xb0 0xde 0xb4 0xe8 -# CHECK: r17:16 = vmpyweh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 = vmpyweh(r21:20,r31:30):<<1:rnd:sat 0xf0 0xde 0x34 0xe8 -# CHECK: r17:16 = vmpywoh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 = vmpywoh(r21:20,r31:30):rnd:sat 0xf0 0xde 0xb4 0xe8 -# CHECK: r17:16 = vmpywoh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 = vmpywoh(r21:20,r31:30):<<1:rnd:sat 0xb0 0xde 0x14 0xea -# CHECK: r17:16 += vmpyweh(r21:20, r31:30):sat +# CHECK: r17:16 += vmpyweh(r21:20,r31:30):sat 0xb0 0xde 0x94 0xea -# CHECK: r17:16 += vmpyweh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 += vmpyweh(r21:20,r31:30):<<1:sat 0xf0 0xde 0x14 0xea -# CHECK: r17:16 += vmpywoh(r21:20, r31:30):sat +# CHECK: r17:16 += vmpywoh(r21:20,r31:30):sat 0xf0 0xde 0x94 0xea -# CHECK: r17:16 += vmpywoh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 += vmpywoh(r21:20,r31:30):<<1:sat 0xb0 0xde 0x34 0xea -# CHECK: r17:16 += vmpyweh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 += vmpyweh(r21:20,r31:30):rnd:sat 0xb0 0xde 0xb4 0xea -# CHECK: r17:16 += vmpyweh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 += vmpyweh(r21:20,r31:30):<<1:rnd:sat 0xf0 0xde 0x34 0xea -# CHECK: r17:16 += vmpywoh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 += vmpywoh(r21:20,r31:30):rnd:sat 0xf0 0xde 0xb4 0xea -# CHECK: r17:16 += vmpywoh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 += vmpywoh(r21:20,r31:30):<<1:rnd:sat # Vector multiply word by unsigned half (32x16) 0xb0 0xde 0x54 0xe8 -# CHECK: r17:16 = vmpyweuh(r21:20, r31:30):sat +# CHECK: r17:16 = vmpyweuh(r21:20,r31:30):sat 0xb0 0xde 0xd4 0xe8 -# CHECK: r17:16 = vmpyweuh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vmpyweuh(r21:20,r31:30):<<1:sat 0xf0 0xde 0x54 0xe8 -# CHECK: r17:16 = vmpywouh(r21:20, r31:30):sat +# CHECK: r17:16 = vmpywouh(r21:20,r31:30):sat 0xf0 0xde 0xd4 0xe8 -# CHECK: r17:16 = vmpywouh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vmpywouh(r21:20,r31:30):<<1:sat 0xb0 0xde 0x74 0xe8 -# CHECK: r17:16 = vmpyweuh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 = vmpyweuh(r21:20,r31:30):rnd:sat 0xb0 0xde 0xf4 0xe8 -# CHECK: r17:16 = vmpyweuh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 = vmpyweuh(r21:20,r31:30):<<1:rnd:sat 0xf0 0xde 0x74 0xe8 -# CHECK: r17:16 = vmpywouh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 = vmpywouh(r21:20,r31:30):rnd:sat 0xf0 0xde 0xf4 0xe8 -# CHECK: r17:16 = vmpywouh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 = vmpywouh(r21:20,r31:30):<<1:rnd:sat 0xb0 0xde 0x54 0xea -# CHECK: r17:16 += vmpyweuh(r21:20, r31:30):sat +# CHECK: r17:16 += vmpyweuh(r21:20,r31:30):sat 0xb0 0xde 0xd4 0xea -# CHECK: r17:16 += vmpyweuh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 += vmpyweuh(r21:20,r31:30):<<1:sat 0xf0 0xde 0x54 0xea -# CHECK: r17:16 += vmpywouh(r21:20, r31:30):sat +# CHECK: r17:16 += vmpywouh(r21:20,r31:30):sat 0xf0 0xde 0xd4 0xea -# CHECK: r17:16 += vmpywouh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 += vmpywouh(r21:20,r31:30):<<1:sat 0xb0 0xde 0x74 0xea -# CHECK: r17:16 += vmpyweuh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 += vmpyweuh(r21:20,r31:30):rnd:sat 0xb0 0xde 0xf4 0xea -# CHECK: r17:16 += vmpyweuh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 += vmpyweuh(r21:20,r31:30):<<1:rnd:sat 0xf0 0xde 0x74 0xea -# CHECK: r17:16 += vmpywouh(r21:20, r31:30):rnd:sat +# CHECK: r17:16 += vmpywouh(r21:20,r31:30):rnd:sat 0xf0 0xde 0xf4 0xea -# CHECK: r17:16 += vmpywouh(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17:16 += vmpywouh(r21:20,r31:30):<<1:rnd:sat # Multiply signed halfwords 0x10 0xdf 0x95 0xe4 -# CHECK: r17:16 = mpy(r21.l, r31.l):<<1 +# CHECK: r17:16 = mpy(r21.l,r31.l):<<1 0x30 0xdf 0x95 0xe4 -# CHECK: r17:16 = mpy(r21.l, r31.h):<<1 +# CHECK: r17:16 = mpy(r21.l,r31.h):<<1 0x50 0xdf 0x95 0xe4 -# CHECK: r17:16 = mpy(r21.h, r31.l):<<1 +# CHECK: r17:16 = mpy(r21.h,r31.l):<<1 0x70 0xdf 0x95 0xe4 -# CHECK: r17:16 = mpy(r21.h, r31.h):<<1 +# CHECK: r17:16 = mpy(r21.h,r31.h):<<1 0x10 0xdf 0xb5 0xe4 -# CHECK: r17:16 = mpy(r21.l, r31.l):<<1:rnd +# CHECK: r17:16 = mpy(r21.l,r31.l):<<1:rnd 0x30 0xdf 0xb5 0xe4 -# CHECK: r17:16 = mpy(r21.l, r31.h):<<1:rnd +# CHECK: r17:16 = mpy(r21.l,r31.h):<<1:rnd 0x50 0xdf 0xb5 0xe4 -# CHECK: r17:16 = mpy(r21.h, r31.l):<<1:rnd +# CHECK: r17:16 = mpy(r21.h,r31.l):<<1:rnd 0x70 0xdf 0xb5 0xe4 -# CHECK: r17:16 = mpy(r21.h, r31.h):<<1:rnd +# CHECK: r17:16 = mpy(r21.h,r31.h):<<1:rnd 0x10 0xdf 0x95 0xe6 -# CHECK: r17:16 += mpy(r21.l, r31.l):<<1 +# CHECK: r17:16 += mpy(r21.l,r31.l):<<1 0x30 0xdf 0x95 0xe6 -# CHECK: r17:16 += mpy(r21.l, r31.h):<<1 +# CHECK: r17:16 += mpy(r21.l,r31.h):<<1 0x50 0xdf 0x95 0xe6 -# CHECK: r17:16 += mpy(r21.h, r31.l):<<1 +# CHECK: r17:16 += mpy(r21.h,r31.l):<<1 0x70 0xdf 0x95 0xe6 -# CHECK: r17:16 += mpy(r21.h, r31.h):<<1 +# CHECK: r17:16 += mpy(r21.h,r31.h):<<1 0x10 0xdf 0xb5 0xe6 -# CHECK: r17:16 -= mpy(r21.l, r31.l):<<1 +# CHECK: r17:16 -= mpy(r21.l,r31.l):<<1 0x30 0xdf 0xb5 0xe6 -# CHECK: r17:16 -= mpy(r21.l, r31.h):<<1 +# CHECK: r17:16 -= mpy(r21.l,r31.h):<<1 0x50 0xdf 0xb5 0xe6 -# CHECK: r17:16 -= mpy(r21.h, r31.l):<<1 +# CHECK: r17:16 -= mpy(r21.h,r31.l):<<1 0x70 0xdf 0xb5 0xe6 -# CHECK: r17:16 -= mpy(r21.h, r31.h):<<1 +# CHECK: r17:16 -= mpy(r21.h,r31.h):<<1 0x11 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.l, r31.l):<<1 +# CHECK: r17 = mpy(r21.l,r31.l):<<1 0x31 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.l, r31.h):<<1 +# CHECK: r17 = mpy(r21.l,r31.h):<<1 0x51 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.h, r31.l):<<1 +# CHECK: r17 = mpy(r21.h,r31.l):<<1 0x71 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.h, r31.h):<<1 +# CHECK: r17 = mpy(r21.h,r31.h):<<1 0x91 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.l, r31.l):<<1:sat +# CHECK: r17 = mpy(r21.l,r31.l):<<1:sat 0xb1 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.l, r31.h):<<1:sat +# CHECK: r17 = mpy(r21.l,r31.h):<<1:sat 0xd1 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.h, r31.l):<<1:sat +# CHECK: r17 = mpy(r21.h,r31.l):<<1:sat 0xf1 0xdf 0x95 0xec -# CHECK: r17 = mpy(r21.h, r31.h):<<1:sat +# CHECK: r17 = mpy(r21.h,r31.h):<<1:sat 0x11 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.l, r31.l):<<1:rnd +# CHECK: r17 = mpy(r21.l,r31.l):<<1:rnd 0x31 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.l, r31.h):<<1:rnd +# CHECK: r17 = mpy(r21.l,r31.h):<<1:rnd 0x51 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.h, r31.l):<<1:rnd +# CHECK: r17 = mpy(r21.h,r31.l):<<1:rnd 0x71 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.h, r31.h):<<1:rnd +# CHECK: r17 = mpy(r21.h,r31.h):<<1:rnd 0x91 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.l, r31.l):<<1:rnd:sat +# CHECK: r17 = mpy(r21.l,r31.l):<<1:rnd:sat 0xb1 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.l, r31.h):<<1:rnd:sat +# CHECK: r17 = mpy(r21.l,r31.h):<<1:rnd:sat 0xd1 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.h, r31.l):<<1:rnd:sat +# CHECK: r17 = mpy(r21.h,r31.l):<<1:rnd:sat 0xf1 0xdf 0xb5 0xec -# CHECK: r17 = mpy(r21.h, r31.h):<<1:rnd:sat +# CHECK: r17 = mpy(r21.h,r31.h):<<1:rnd:sat 0x11 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.l, r31.l):<<1 +# CHECK: r17 += mpy(r21.l,r31.l):<<1 0x31 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.l, r31.h):<<1 +# CHECK: r17 += mpy(r21.l,r31.h):<<1 0x51 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.h, r31.l):<<1 +# CHECK: r17 += mpy(r21.h,r31.l):<<1 0x71 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.h, r31.h):<<1 +# CHECK: r17 += mpy(r21.h,r31.h):<<1 0x91 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.l, r31.l):<<1:sat +# CHECK: r17 += mpy(r21.l,r31.l):<<1:sat 0xb1 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.l, r31.h):<<1:sat +# CHECK: r17 += mpy(r21.l,r31.h):<<1:sat 0xd1 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.h, r31.l):<<1:sat +# CHECK: r17 += mpy(r21.h,r31.l):<<1:sat 0xf1 0xdf 0x95 0xee -# CHECK: r17 += mpy(r21.h, r31.h):<<1:sat +# CHECK: r17 += mpy(r21.h,r31.h):<<1:sat 0x11 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.l, r31.l):<<1 +# CHECK: r17 -= mpy(r21.l,r31.l):<<1 0x31 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.l, r31.h):<<1 +# CHECK: r17 -= mpy(r21.l,r31.h):<<1 0x51 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.h, r31.l):<<1 +# CHECK: r17 -= mpy(r21.h,r31.l):<<1 0x71 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.h, r31.h):<<1 +# CHECK: r17 -= mpy(r21.h,r31.h):<<1 0x91 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.l, r31.l):<<1:sat +# CHECK: r17 -= mpy(r21.l,r31.l):<<1:sat 0xb1 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.l, r31.h):<<1:sat +# CHECK: r17 -= mpy(r21.l,r31.h):<<1:sat 0xd1 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.h, r31.l):<<1:sat +# CHECK: r17 -= mpy(r21.h,r31.l):<<1:sat 0xf1 0xdf 0xb5 0xee -# CHECK: r17 -= mpy(r21.h, r31.h):<<1:sat +# CHECK: r17 -= mpy(r21.h,r31.h):<<1:sat # Multiply unsigned halfwords 0x10 0xdf 0xd5 0xe4 -# CHECK: r17:16 = mpyu(r21.l, r31.l):<<1 +# CHECK: r17:16 = mpyu(r21.l,r31.l):<<1 0x30 0xdf 0xd5 0xe4 -# CHECK: r17:16 = mpyu(r21.l, r31.h):<<1 +# CHECK: r17:16 = mpyu(r21.l,r31.h):<<1 0x50 0xdf 0xd5 0xe4 -# CHECK: r17:16 = mpyu(r21.h, r31.l):<<1 +# CHECK: r17:16 = mpyu(r21.h,r31.l):<<1 0x70 0xdf 0xd5 0xe4 -# CHECK: r17:16 = mpyu(r21.h, r31.h):<<1 +# CHECK: r17:16 = mpyu(r21.h,r31.h):<<1 0x10 0xdf 0xd5 0xe6 -# CHECK: r17:16 += mpyu(r21.l, r31.l):<<1 +# CHECK: r17:16 += mpyu(r21.l,r31.l):<<1 0x30 0xdf 0xd5 0xe6 -# CHECK: r17:16 += mpyu(r21.l, r31.h):<<1 +# CHECK: r17:16 += mpyu(r21.l,r31.h):<<1 0x50 0xdf 0xd5 0xe6 -# CHECK: r17:16 += mpyu(r21.h, r31.l):<<1 +# CHECK: r17:16 += mpyu(r21.h,r31.l):<<1 0x70 0xdf 0xd5 0xe6 -# CHECK: r17:16 += mpyu(r21.h, r31.h):<<1 +# CHECK: r17:16 += mpyu(r21.h,r31.h):<<1 0x10 0xdf 0xf5 0xe6 -# CHECK: r17:16 -= mpyu(r21.l, r31.l):<<1 +# CHECK: r17:16 -= mpyu(r21.l,r31.l):<<1 0x30 0xdf 0xf5 0xe6 -# CHECK: r17:16 -= mpyu(r21.l, r31.h):<<1 +# CHECK: r17:16 -= mpyu(r21.l,r31.h):<<1 0x50 0xdf 0xf5 0xe6 -# CHECK: r17:16 -= mpyu(r21.h, r31.l):<<1 +# CHECK: r17:16 -= mpyu(r21.h,r31.l):<<1 0x70 0xdf 0xf5 0xe6 -# CHECK: r17:16 -= mpyu(r21.h, r31.h):<<1 +# CHECK: r17:16 -= mpyu(r21.h,r31.h):<<1 0x11 0xdf 0xd5 0xec -# CHECK: r17 = mpyu(r21.l, r31.l):<<1 +# CHECK: r17 = mpyu(r21.l,r31.l):<<1 0x31 0xdf 0xd5 0xec -# CHECK: r17 = mpyu(r21.l, r31.h):<<1 +# CHECK: r17 = mpyu(r21.l,r31.h):<<1 0x51 0xdf 0xd5 0xec -# CHECK: r17 = mpyu(r21.h, r31.l):<<1 +# CHECK: r17 = mpyu(r21.h,r31.l):<<1 0x71 0xdf 0xd5 0xec -# CHECK: r17 = mpyu(r21.h, r31.h):<<1 +# CHECK: r17 = mpyu(r21.h,r31.h):<<1 0x11 0xdf 0xd5 0xee -# CHECK: r17 += mpyu(r21.l, r31.l):<<1 +# CHECK: r17 += mpyu(r21.l,r31.l):<<1 0x31 0xdf 0xd5 0xee -# CHECK: r17 += mpyu(r21.l, r31.h):<<1 +# CHECK: r17 += mpyu(r21.l,r31.h):<<1 0x51 0xdf 0xd5 0xee -# CHECK: r17 += mpyu(r21.h, r31.l):<<1 +# CHECK: r17 += mpyu(r21.h,r31.l):<<1 0x71 0xdf 0xd5 0xee -# CHECK: r17 += mpyu(r21.h, r31.h):<<1 +# CHECK: r17 += mpyu(r21.h,r31.h):<<1 0x11 0xdf 0xf5 0xee -# CHECK: r17 -= mpyu(r21.l, r31.l):<<1 +# CHECK: r17 -= mpyu(r21.l,r31.l):<<1 0x31 0xdf 0xf5 0xee -# CHECK: r17 -= mpyu(r21.l, r31.h):<<1 +# CHECK: r17 -= mpyu(r21.l,r31.h):<<1 0x51 0xdf 0xf5 0xee -# CHECK: r17 -= mpyu(r21.h, r31.l):<<1 +# CHECK: r17 -= mpyu(r21.h,r31.l):<<1 0x71 0xdf 0xf5 0xee -# CHECK: r17 -= mpyu(r21.h, r31.h):<<1 +# CHECK: r17 -= mpyu(r21.h,r31.h):<<1 # Polynomial multiply words 0xf0 0xdf 0x55 0xe5 -# CHECK: r17:16 = pmpyw(r21, r31) +# CHECK: r17:16 = pmpyw(r21,r31) 0xf0 0xdf 0x35 0xe7 -# CHECK: r17:16 ^= pmpyw(r21, r31) +# CHECK: r17:16 ^= pmpyw(r21,r31) # Vector reduce multiply word by signed half (32x16) 0x50 0xde 0x34 0xe8 -# CHECK: r17:16 = vrmpywoh(r21:20, r31:30) +# CHECK: r17:16 = vrmpywoh(r21:20,r31:30) 0x50 0xde 0xb4 0xe8 -# CHECK: r17:16 = vrmpywoh(r21:20, r31:30):<<1 +# CHECK: r17:16 = vrmpywoh(r21:20,r31:30):<<1 0x90 0xde 0x54 0xe8 -# CHECK: r17:16 = vrmpyweh(r21:20, r31:30) +# CHECK: r17:16 = vrmpyweh(r21:20,r31:30) 0x90 0xde 0xd4 0xe8 -# CHECK: r17:16 = vrmpyweh(r21:20, r31:30):<<1 +# CHECK: r17:16 = vrmpyweh(r21:20,r31:30):<<1 0xd0 0xde 0x74 0xea -# CHECK: r17:16 += vrmpywoh(r21:20, r31:30) +# CHECK: r17:16 += vrmpywoh(r21:20,r31:30) 0xd0 0xde 0xf4 0xea -# CHECK: r17:16 += vrmpywoh(r21:20, r31:30):<<1 +# CHECK: r17:16 += vrmpywoh(r21:20,r31:30):<<1 0xd0 0xde 0x34 0xea -# CHECK: r17:16 += vrmpyweh(r21:20, r31:30) +# CHECK: r17:16 += vrmpyweh(r21:20,r31:30) 0xd0 0xde 0xb4 0xea -# CHECK: r17:16 += vrmpyweh(r21:20, r31:30):<<1 +# CHECK: r17:16 += vrmpyweh(r21:20,r31:30):<<1 # Multiply and use upper result 0x31 0xdf 0x15 0xed -# CHECK: r17 = mpy(r21, r31) +# CHECK: r17 = mpy(r21,r31) 0x31 0xdf 0x35 0xed -# CHECK: r17 = mpy(r21, r31):rnd +# CHECK: r17 = mpy(r21,r31):rnd 0x31 0xdf 0x55 0xed -# CHECK: r17 = mpyu(r21, r31) +# CHECK: r17 = mpyu(r21,r31) 0x31 0xdf 0x75 0xed -# CHECK: r17 = mpysu(r21, r31) +# CHECK: r17 = mpysu(r21,r31) 0x11 0xdf 0xb5 0xed -# CHECK: r17 = mpy(r21, r31.h):<<1:sat +# CHECK: r17 = mpy(r21,r31.h):<<1:sat 0x31 0xdf 0xb5 0xed -# CHECK: r17 = mpy(r21, r31.l):<<1:sat +# CHECK: r17 = mpy(r21,r31.l):<<1:sat 0x91 0xdf 0xb5 0xed -# CHECK: r17 = mpy(r21, r31.h):<<1:rnd:sat +# CHECK: r17 = mpy(r21,r31.h):<<1:rnd:sat 0x11 0xdf 0xf5 0xed -# CHECK: r17 = mpy(r21, r31):<<1:sat +# CHECK: r17 = mpy(r21,r31):<<1:sat 0x91 0xdf 0xf5 0xed -# CHECK: r17 = mpy(r21, r31.l):<<1:rnd:sat +# CHECK: r17 = mpy(r21,r31.l):<<1:rnd:sat 0x51 0xdf 0xb5 0xed -# CHECK: r17 = mpy(r21, r31):<<1 +# CHECK: r17 = mpy(r21,r31):<<1 0x11 0xdf 0x75 0xef -# CHECK: r17 += mpy(r21, r31):<<1:sat +# CHECK: r17 += mpy(r21,r31):<<1:sat 0x31 0xdf 0x75 0xef -# CHECK: r17 -= mpy(r21, r31):<<1:sat +# CHECK: r17 -= mpy(r21,r31):<<1:sat # Multiply and use full result 0x10 0xdf 0x15 0xe5 -# CHECK: r17:16 = mpy(r21, r31) +# CHECK: r17:16 = mpy(r21,r31) 0x10 0xdf 0x55 0xe5 -# CHECK: r17:16 = mpyu(r21, r31) +# CHECK: r17:16 = mpyu(r21,r31) 0x10 0xdf 0x15 0xe7 -# CHECK: r17:16 += mpy(r21, r31) +# CHECK: r17:16 += mpy(r21,r31) 0x10 0xdf 0x35 0xe7 -# CHECK: r17:16 -= mpy(r21, r31) +# CHECK: r17:16 -= mpy(r21,r31) 0x10 0xdf 0x55 0xe7 -# CHECK: r17:16 += mpyu(r21, r31) +# CHECK: r17:16 += mpyu(r21,r31) 0x10 0xdf 0x75 0xe7 -# CHECK: r17:16 -= mpyu(r21, r31) +# CHECK: r17:16 -= mpyu(r21,r31) # Vector dual multiply 0x90 0xde 0x14 0xe8 -# CHECK: r17:16 = vdmpy(r21:20, r31:30):sat +# CHECK: r17:16 = vdmpy(r21:20,r31:30):sat 0x90 0xde 0x94 0xe8 -# CHECK: r17:16 = vdmpy(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vdmpy(r21:20,r31:30):<<1:sat 0x90 0xde 0x14 0xea -# CHECK: r17:16 += vdmpy(r21:20, r31:30):sat +# CHECK: r17:16 += vdmpy(r21:20,r31:30):sat 0x90 0xde 0x94 0xea -# CHECK: r17:16 += vdmpy(r21:20, r31:30):<<1:sat +# CHECK: r17:16 += vdmpy(r21:20,r31:30):<<1:sat # Vector dual multiply with round and pack 0x11 0xde 0x14 0xe9 -# CHECK: r17 = vdmpy(r21:20, r31:30):rnd:sat +# CHECK: r17 = vdmpy(r21:20,r31:30):rnd:sat 0x11 0xde 0x94 0xe9 -# CHECK: r17 = vdmpy(r21:20, r31:30):<<1:rnd:sat +# CHECK: r17 = vdmpy(r21:20,r31:30):<<1:rnd:sat # Vector reduce multiply bytes 0x30 0xde 0x94 0xe8 -# CHECK: r17:16 = vrmpybu(r21:20, r31:30) +# CHECK: r17:16 = vrmpybu(r21:20,r31:30) 0x30 0xde 0xd4 0xe8 -# CHECK: r17:16 = vrmpybsu(r21:20, r31:30) +# CHECK: r17:16 = vrmpybsu(r21:20,r31:30) 0x30 0xde 0x94 0xea -# CHECK: r17:16 += vrmpybu(r21:20, r31:30) +# CHECK: r17:16 += vrmpybu(r21:20,r31:30) 0x30 0xde 0xd4 0xea -# CHECK: r17:16 += vrmpybsu(r21:20, r31:30) +# CHECK: r17:16 += vrmpybsu(r21:20,r31:30) # Vector dual multiply signed by unsigned bytes 0x30 0xde 0xb4 0xe8 -# CHECK: r17:16 = vdmpybsu(r21:20, r31:30):sat +# CHECK: r17:16 = vdmpybsu(r21:20,r31:30):sat 0x30 0xde 0x34 0xea -# CHECK: r17:16 += vdmpybsu(r21:20, r31:30):sat +# CHECK: r17:16 += vdmpybsu(r21:20,r31:30):sat # Vector multiply even haldwords 0xd0 0xde 0x14 0xe8 -# CHECK: r17:16 = vmpyeh(r21:20, r31:30):sat +# CHECK: r17:16 = vmpyeh(r21:20,r31:30):sat 0xd0 0xde 0x94 0xe8 -# CHECK: r17:16 = vmpyeh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 = vmpyeh(r21:20,r31:30):<<1:sat 0x50 0xde 0x34 0xea -# CHECK: r17:16 += vmpyeh(r21:20, r31:30) +# CHECK: r17:16 += vmpyeh(r21:20,r31:30) 0xd0 0xde 0x14 0xea -# CHECK: r17:16 += vmpyeh(r21:20, r31:30):sat +# CHECK: r17:16 += vmpyeh(r21:20,r31:30):sat 0xd0 0xde 0x94 0xea -# CHECK: r17:16 += vmpyeh(r21:20, r31:30):<<1:sat +# CHECK: r17:16 += vmpyeh(r21:20,r31:30):<<1:sat # Vector multiply halfwords 0xb0 0xdf 0x15 0xe5 -# CHECK: r17:16 = vmpyh(r21, r31):sat +# CHECK: r17:16 = vmpyh(r21,r31):sat 0xb0 0xdf 0x95 0xe5 -# CHECK: r17:16 = vmpyh(r21, r31):<<1:sat +# CHECK: r17:16 = vmpyh(r21,r31):<<1:sat 0x30 0xdf 0x35 0xe7 -# CHECK: r17:16 += vmpyh(r21, r31) +# CHECK: r17:16 += vmpyh(r21,r31) 0xb0 0xdf 0x15 0xe7 -# CHECK: r17:16 += vmpyh(r21, r31):sat +# CHECK: r17:16 += vmpyh(r21,r31):sat 0xb0 0xdf 0x95 0xe7 -# CHECK: r17:16 += vmpyh(r21, r31):<<1:sat +# CHECK: r17:16 += vmpyh(r21,r31):<<1:sat # Vector multiply halfwords with round and pack 0xf1 0xdf 0x35 0xed -# CHECK: r17 = vmpyh(r21, r31):rnd:sat +# CHECK: r17 = vmpyh(r21,r31):rnd:sat 0xf1 0xdf 0xb5 0xed -# CHECK: r17 = vmpyh(r21, r31):<<1:rnd:sat +# CHECK: r17 = vmpyh(r21,r31):<<1:rnd:sat # Vector multiply halfwords signed by unsigned 0xf0 0xdf 0x15 0xe5 -# CHECK: r17:16 = vmpyhsu(r21, r31):sat +# CHECK: r17:16 = vmpyhsu(r21,r31):sat 0xf0 0xdf 0x95 0xe5 -# CHECK: r17:16 = vmpyhsu(r21, r31):<<1:sat +# CHECK: r17:16 = vmpyhsu(r21,r31):<<1:sat 0xb0 0xdf 0x75 0xe7 -# CHECK: r17:16 += vmpyhsu(r21, r31):sat +# CHECK: r17:16 += vmpyhsu(r21,r31):sat 0xb0 0xdf 0xf5 0xe7 -# CHECK: r17:16 += vmpyhsu(r21, r31):<<1:sat +# CHECK: r17:16 += vmpyhsu(r21,r31):<<1:sat # Vector reduce multiply halfwords 0x50 0xde 0x14 0xe8 -# CHECK: r17:16 = vrmpyh(r21:20, r31:30) +# CHECK: r17:16 = vrmpyh(r21:20,r31:30) 0x50 0xde 0x14 0xea -# CHECK: r17:16 += vrmpyh(r21:20, r31:30) +# CHECK: r17:16 += vrmpyh(r21:20,r31:30) # Vector multiply bytes 0x30 0xdf 0x55 0xe5 -# CHECK: r17:16 = vmpybsu(r21, r31) +# CHECK: r17:16 = vmpybsu(r21,r31) 0x30 0xdf 0x95 0xe5 -# CHECK: r17:16 = vmpybu(r21, r31) +# CHECK: r17:16 = vmpybu(r21,r31) 0x30 0xdf 0x95 0xe7 -# CHECK: r17:16 += vmpybu(r21, r31) +# CHECK: r17:16 += vmpybu(r21,r31) 0x30 0xdf 0xd5 0xe7 -# CHECK: r17:16 += vmpybsu(r21, r31) +# CHECK: r17:16 += vmpybsu(r21,r31) # Vector polynomial multiply halfwords 0xf0 0xdf 0xd5 0xe5 -# CHECK: r17:16 = vpmpyh(r21, r31) +# CHECK: r17:16 = vpmpyh(r21,r31) 0xf0 0xdf 0xb5 0xe7 -# CHECK: r17:16 ^= vpmpyh(r21, r31) +# CHECK: r17:16 ^= vpmpyh(r21,r31) diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_perm.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_perm.txt index 91d2fc5ae69..e8173fb049c 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_perm.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_perm.txt @@ -3,7 +3,7 @@ # CABAC decode bin 0xd0 0xde 0xd4 0xc1 -# CHECK: r17:16 = decbin(r21:20, r31:30) +# CHECK: r17:16 = decbin(r21:20,r31:30) # Saturate 0x11 0xc0 0xd4 0x88 @@ -23,9 +23,9 @@ # Vector align 0x70 0xd4 0x1e 0xc2 -# CHECK: r17:16 = valignb(r21:20, r31:30, p3) +# CHECK: r17:16 = valignb(r21:20,r31:30,p3) 0x70 0xde 0x94 0xc2 -# CHECK: r17:16 = vspliceb(r21:20, r31:30, p3) +# CHECK: r17:16 = vspliceb(r21:20,r31:30,p3) # Vector round and pack 0x91 0xc0 0x94 0x88 @@ -59,13 +59,13 @@ # Vector shuffle 0x50 0xde 0x14 0xc1 -# CHECK: r17:16 = shuffeb(r21:20, r31:30) +# CHECK: r17:16 = shuffeb(r21:20,r31:30) 0x90 0xd4 0x1e 0xc1 -# CHECK: r17:16 = shuffob(r21:20, r31:30) +# CHECK: r17:16 = shuffob(r21:20,r31:30) 0xd0 0xde 0x14 0xc1 -# CHECK: r17:16 = shuffeh(r21:20, r31:30) +# CHECK: r17:16 = shuffeh(r21:20,r31:30) 0x10 0xd4 0x9e 0xc1 -# CHECK: r17:16 = shuffoh(r21:20, r31:30) +# CHECK: r17:16 = shuffoh(r21:20,r31:30) # Vector splat bytes 0xf1 0xc0 0x55 0x8c @@ -77,9 +77,9 @@ # Vector splice 0x70 0xde 0x94 0xc0 -# CHECK: r17:16 = vspliceb(r21:20, r31:30, #3) +# CHECK: r17:16 = vspliceb(r21:20,r31:30,#3) 0x70 0xde 0x94 0xc2 -# CHECK: r17:16 = vspliceb(r21:20, r31:30, p3) +# CHECK: r17:16 = vspliceb(r21:20,r31:30,p3) # Vector sign extend 0x10 0xc0 0x15 0x84 @@ -93,9 +93,9 @@ 0x51 0xc0 0x94 0x88 # CHECK: r17 = vtrunehb(r21:20) 0x50 0xde 0x94 0xc1 -# CHECK: r17:16 = vtrunewh(r21:20, r31:30) +# CHECK: r17:16 = vtrunewh(r21:20,r31:30) 0x90 0xde 0x94 0xc1 -# CHECK: r17:16 = vtrunowh(r21:20, r31:30) +# CHECK: r17:16 = vtrunowh(r21:20,r31:30) # Vector zero extend 0x50 0xc0 0x15 0x84 diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_pred.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_pred.txt index cec6d1be0f1..816eef58a09 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_pred.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_pred.txt @@ -3,59 +3,59 @@ # Bounds check 0x83 0xf4 0x10 0xd2 -# CHECK: p3 = boundscheck(r17:16, r21:20):raw:lo +# CHECK: p3 = boundscheck(r17:16,r21:20):raw:lo 0xa3 0xf4 0x10 0xd2 -# CHECK: p3 = boundscheck(r17:16, r21:20):raw:hi +# CHECK: p3 = boundscheck(r17:16,r21:20):raw:hi # Compare byte 0x43 0xd5 0xd1 0xc7 -# CHECK: p3 = cmpb.gt(r17, r21) +# CHECK: p3 = cmpb.gt(r17,r21) 0xc3 0xd5 0xd1 0xc7 -# CHECK: p3 = cmpb.eq(r17, r21) +# CHECK: p3 = cmpb.eq(r17,r21) 0xe3 0xd5 0xd1 0xc7 -# CHECK: p3 = cmpb.gtu(r17, r21) +# CHECK: p3 = cmpb.gtu(r17,r21) 0xa3 0xc2 0x11 0xdd -# CHECK: p3 = cmpb.eq(r17, #21) +# CHECK: p3 = cmpb.eq(r17,#21) 0xa3 0xc2 0x31 0xdd -# CHECK: p3 = cmpb.gt(r17, #21) +# CHECK: p3 = cmpb.gt(r17,#21) 0xa3 0xc2 0x51 0xdd -# CHECK: p3 = cmpb.gtu(r17, #21) +# CHECK: p3 = cmpb.gtu(r17,#21) # Compare half 0x63 0xd5 0xd1 0xc7 -# CHECK: p3 = cmph.eq(r17, r21) +# CHECK: p3 = cmph.eq(r17,r21) 0x83 0xd5 0xd1 0xc7 -# CHECK: p3 = cmph.gt(r17, r21) +# CHECK: p3 = cmph.gt(r17,r21) 0xa3 0xd5 0xd1 0xc7 -# CHECK: p3 = cmph.gtu(r17, r21) +# CHECK: p3 = cmph.gtu(r17,r21) 0xab 0xc2 0x11 0xdd -# CHECK: p3 = cmph.eq(r17, #21) +# CHECK: p3 = cmph.eq(r17,#21) 0xab 0xc2 0x31 0xdd -# CHECK: p3 = cmph.gt(r17, #21) +# CHECK: p3 = cmph.gt(r17,#21) 0xab 0xc2 0x51 0xdd -# CHECK: p3 = cmph.gtu(r17, #21) +# CHECK: p3 = cmph.gtu(r17,#21) # Compare doublewords 0x03 0xde 0x94 0xd2 -# CHECK: p3 = cmp.eq(r21:20, r31:30) +# CHECK: p3 = cmp.eq(r21:20,r31:30) 0x43 0xde 0x94 0xd2 -# CHECK: p3 = cmp.gt(r21:20, r31:30) +# CHECK: p3 = cmp.gt(r21:20,r31:30) 0x83 0xde 0x94 0xd2 -# CHECK: p3 = cmp.gtu(r21:20, r31:30) +# CHECK: p3 = cmp.gtu(r21:20,r31:30) # Compare bitmask 0x03 0xd5 0x91 0x85 -# CHECK: p3 = bitsclr(r17, #21) +# CHECK: p3 = bitsclr(r17,#21) 0x03 0xd5 0xb1 0x85 -# CHECK: p3 = !bitsclr(r17, #21) +# CHECK: p3 = !bitsclr(r17,#21) 0x03 0xd5 0x51 0xc7 -# CHECK: p3 = bitsset(r17, r21) +# CHECK: p3 = bitsset(r17,r21) 0x03 0xd5 0x71 0xc7 -# CHECK: p3 = !bitsset(r17, r21) +# CHECK: p3 = !bitsset(r17,r21) 0x03 0xd5 0x91 0xc7 -# CHECK: p3 = bitsclr(r17, r21) +# CHECK: p3 = bitsclr(r17,r21) 0x03 0xd5 0xb1 0xc7 -# CHECK: p3 = !bitsclr(r17, r21) +# CHECK: p3 = !bitsclr(r17,r21) # mask generate from predicate 0x10 0xc3 0x00 0x86 @@ -63,7 +63,7 @@ # Check for TLB match 0x63 0xf5 0x10 0xd2 -# CHECK: p3 = tlbmatch(r17:16, r21) +# CHECK: p3 = tlbmatch(r17:16,r21) # Predicate Transfer 0x03 0xc0 0x45 0x85 @@ -73,64 +73,64 @@ # Test bit 0x03 0xd5 0x11 0x85 -# CHECK: p3 = tstbit(r17, #21) +# CHECK: p3 = tstbit(r17,#21) 0x03 0xd5 0x31 0x85 -# CHECK: p3 = !tstbit(r17, #21) +# CHECK: p3 = !tstbit(r17,#21) 0x03 0xd5 0x11 0xc7 -# CHECK: p3 = tstbit(r17, r21) +# CHECK: p3 = tstbit(r17,r21) 0x03 0xd5 0x31 0xc7 -# CHECK: p3 = !tstbit(r17, r21) +# CHECK: p3 = !tstbit(r17,r21) # Vector compare halfwords 0x63 0xde 0x14 0xd2 -# CHECK: p3 = vcmph.eq(r21:20, r31:30) +# CHECK: p3 = vcmph.eq(r21:20,r31:30) 0x83 0xde 0x14 0xd2 -# CHECK: p3 = vcmph.gt(r21:20, r31:30) +# CHECK: p3 = vcmph.gt(r21:20,r31:30) 0xa3 0xde 0x14 0xd2 -# CHECK: p3 = vcmph.gtu(r21:20, r31:30) +# CHECK: p3 = vcmph.gtu(r21:20,r31:30) 0xeb 0xc3 0x14 0xdc -# CHECK: p3 = vcmph.eq(r21:20, #31) +# CHECK: p3 = vcmph.eq(r21:20,#31) 0xeb 0xc3 0x34 0xdc -# CHECK: p3 = vcmph.gt(r21:20, #31) +# CHECK: p3 = vcmph.gt(r21:20,#31) 0xeb 0xc3 0x54 0xdc -# CHECK: p3 = vcmph.gtu(r21:20, #31) +# CHECK: p3 = vcmph.gtu(r21:20,#31) # Vector compare bytes for any match 0x03 0xfe 0x14 0xd2 -# CHECK: p3 = any8(vcmpb.eq(r21:20, r31:30)) +# CHECK: p3 = any8(vcmpb.eq(r21:20,r31:30)) # Vector compare bytes 0x63 0xde 0x14 0xd2 -# CHECK: p3 = vcmph.eq(r21:20, r31:30) +# CHECK: p3 = vcmph.eq(r21:20,r31:30) 0x83 0xde 0x14 0xd2 -# CHECK: p3 = vcmph.gt(r21:20, r31:30) +# CHECK: p3 = vcmph.gt(r21:20,r31:30) 0xa3 0xde 0x14 0xd2 -# CHECK: p3 = vcmph.gtu(r21:20, r31:30) +# CHECK: p3 = vcmph.gtu(r21:20,r31:30) 0xeb 0xc3 0x14 0xdc -# CHECK: p3 = vcmph.eq(r21:20, #31) +# CHECK: p3 = vcmph.eq(r21:20,#31) 0xeb 0xc3 0x34 0xdc -# CHECK: p3 = vcmph.gt(r21:20, #31) +# CHECK: p3 = vcmph.gt(r21:20,#31) 0xeb 0xc3 0x54 0xdc -# CHECK: p3 = vcmph.gtu(r21:20, #31) +# CHECK: p3 = vcmph.gtu(r21:20,#31) # Vector compare words 0x03 0xde 0x14 0xd2 -# CHECK: p3 = vcmpw.eq(r21:20, r31:30) +# CHECK: p3 = vcmpw.eq(r21:20,r31:30) 0x23 0xde 0x14 0xd2 -# CHECK: p3 = vcmpw.gt(r21:20, r31:30) +# CHECK: p3 = vcmpw.gt(r21:20,r31:30) 0x43 0xde 0x14 0xd2 -# CHECK: p3 = vcmpw.gtu(r21:20, r31:30) +# CHECK: p3 = vcmpw.gtu(r21:20,r31:30) 0xf3 0xc3 0x14 0xdc -# CHECK: p3 = vcmpw.eq(r21:20, #31) +# CHECK: p3 = vcmpw.eq(r21:20,#31) 0xf3 0xc3 0x34 0xdc -# CHECK: p3 = vcmpw.gt(r21:20, #31) +# CHECK: p3 = vcmpw.gt(r21:20,#31) 0xf3 0xc3 0x54 0xdc -# CHECK: p3 = vcmpw.gtu(r21:20, #31) +# CHECK: p3 = vcmpw.gtu(r21:20,#31) # Viterbi pack even and odd predicate bits 0x11 0xc2 0x03 0x89 -# CHECK: r17 = vitpack(p3, p2) +# CHECK: r17 = vitpack(p3,p2) # Vector mux 0x70 0xde 0x14 0xd1 -# CHECK: r17:16 = vmux(p3, r21:20, r31:30) +# CHECK: r17:16 = vmux(p3,r21:20,r31:30) diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt index e2d6816c1ca..d5688c962cf 100644 --- a/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt +++ b/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt @@ -3,258 +3,258 @@ # Shift by immediate 0x10 0xdf 0x14 0x80 -# CHECK: r17:16 = asr(r21:20, #31) +# CHECK: r17:16 = asr(r21:20,#31) 0x30 0xdf 0x14 0x80 -# CHECK: r17:16 = lsr(r21:20, #31) +# CHECK: r17:16 = lsr(r21:20,#31) 0x50 0xdf 0x14 0x80 -# CHECK: r17:16 = asl(r21:20, #31) +# CHECK: r17:16 = asl(r21:20,#31) 0x11 0xdf 0x15 0x8c -# CHECK: r17 = asr(r21, #31) +# CHECK: r17 = asr(r21,#31) 0x31 0xdf 0x15 0x8c -# CHECK: r17 = lsr(r21, #31) +# CHECK: r17 = lsr(r21,#31) 0x51 0xdf 0x15 0x8c -# CHECK: r17 = asl(r21, #31) +# CHECK: r17 = asl(r21,#31) # Shift by immediate and accumulate 0x10 0xdf 0x14 0x82 -# CHECK: r17:16 -= asr(r21:20, #31) +# CHECK: r17:16 -= asr(r21:20,#31) 0x30 0xdf 0x14 0x82 -# CHECK: r17:16 -= lsr(r21:20, #31) +# CHECK: r17:16 -= lsr(r21:20,#31) 0x50 0xdf 0x14 0x82 -# CHECK: r17:16 -= asl(r21:20, #31) +# CHECK: r17:16 -= asl(r21:20,#31) 0x90 0xdf 0x14 0x82 -# CHECK: r17:16 += asr(r21:20, #31) +# CHECK: r17:16 += asr(r21:20,#31) 0xb0 0xdf 0x14 0x82 -# CHECK: r17:16 += lsr(r21:20, #31) +# CHECK: r17:16 += lsr(r21:20,#31) 0xd0 0xdf 0x14 0x82 -# CHECK: r17:16 += asl(r21:20, #31) +# CHECK: r17:16 += asl(r21:20,#31) 0x11 0xdf 0x15 0x8e -# CHECK: r17 -= asr(r21, #31) +# CHECK: r17 -= asr(r21,#31) 0x31 0xdf 0x15 0x8e -# CHECK: r17 -= lsr(r21, #31) +# CHECK: r17 -= lsr(r21,#31) 0x51 0xdf 0x15 0x8e -# CHECK: r17 -= asl(r21, #31) +# CHECK: r17 -= asl(r21,#31) 0x91 0xdf 0x15 0x8e -# CHECK: r17 += asr(r21, #31) +# CHECK: r17 += asr(r21,#31) 0xb1 0xdf 0x15 0x8e -# CHECK: r17 += lsr(r21, #31) +# CHECK: r17 += lsr(r21,#31) 0xd1 0xdf 0x15 0x8e -# CHECK: r17 += asl(r21, #31) +# CHECK: r17 += asl(r21,#31) 0x4c 0xf7 0x11 0xde -# CHECK: r17 = add(#21, asl(r17, #23)) +# CHECK: r17 = add(#21,asl(r17,#23)) 0x4e 0xf7 0x11 0xde -# CHECK: r17 = sub(#21, asl(r17, #23)) +# CHECK: r17 = sub(#21,asl(r17,#23)) 0x5c 0xf7 0x11 0xde -# CHECK: r17 = add(#21, lsr(r17, #23)) +# CHECK: r17 = add(#21,lsr(r17,#23)) 0x5e 0xf7 0x11 0xde -# CHECK: r17 = sub(#21, lsr(r17, #23)) +# CHECK: r17 = sub(#21,lsr(r17,#23)) # Shift by immediate and add 0xf1 0xd5 0x1f 0xc4 -# CHECK: r17 = addasl(r21, r31, #7) +# CHECK: r17 = addasl(r21,r31,#7) # Shift by immediate and logical 0x10 0xdf 0x54 0x82 -# CHECK: r17:16 &= asr(r21:20, #31) +# CHECK: r17:16 &= asr(r21:20,#31) 0x30 0xdf 0x54 0x82 -# CHECK: r17:16 &= lsr(r21:20, #31) +# CHECK: r17:16 &= lsr(r21:20,#31) 0x50 0xdf 0x54 0x82 -# CHECK: r17:16 &= asl(r21:20, #31) +# CHECK: r17:16 &= asl(r21:20,#31) 0x90 0xdf 0x54 0x82 -# CHECK: r17:16 |= asr(r21:20, #31) +# CHECK: r17:16 |= asr(r21:20,#31) 0xb0 0xdf 0x54 0x82 -# CHECK: r17:16 |= lsr(r21:20, #31) +# CHECK: r17:16 |= lsr(r21:20,#31) 0xd0 0xdf 0x54 0x82 -# CHECK: r17:16 |= asl(r21:20, #31) +# CHECK: r17:16 |= asl(r21:20,#31) 0x30 0xdf 0x94 0x82 -# CHECK: r17:16 ^= lsr(r21:20, #31) +# CHECK: r17:16 ^= lsr(r21:20,#31) 0x50 0xdf 0x94 0x82 -# CHECK: r17:16 ^= asl(r21:20, #31) +# CHECK: r17:16 ^= asl(r21:20,#31) 0x11 0xdf 0x55 0x8e -# CHECK: r17 &= asr(r21, #31) +# CHECK: r17 &= asr(r21,#31) 0x31 0xdf 0x55 0x8e -# CHECK: r17 &= lsr(r21, #31) +# CHECK: r17 &= lsr(r21,#31) 0x51 0xdf 0x55 0x8e -# CHECK: r17 &= asl(r21, #31) +# CHECK: r17 &= asl(r21,#31) 0x91 0xdf 0x55 0x8e -# CHECK: r17 |= asr(r21, #31) +# CHECK: r17 |= asr(r21,#31) 0xb1 0xdf 0x55 0x8e -# CHECK: r17 |= lsr(r21, #31) +# CHECK: r17 |= lsr(r21,#31) 0xd1 0xdf 0x55 0x8e -# CHECK: r17 |= asl(r21, #31) +# CHECK: r17 |= asl(r21,#31) 0x31 0xdf 0x95 0x8e -# CHECK: r17 ^= lsr(r21, #31) +# CHECK: r17 ^= lsr(r21,#31) 0x51 0xdf 0x95 0x8e -# CHECK: r17 ^= asl(r21, #31) +# CHECK: r17 ^= asl(r21,#31) 0x48 0xff 0x11 0xde -# CHECK: r17 = and(#21, asl(r17, #31)) +# CHECK: r17 = and(#21,asl(r17,#31)) 0x4a 0xff 0x11 0xde -# CHECK: r17 = or(#21, asl(r17, #31)) +# CHECK: r17 = or(#21,asl(r17,#31)) 0x58 0xff 0x11 0xde -# CHECK: r17 = and(#21, lsr(r17, #31)) +# CHECK: r17 = and(#21,lsr(r17,#31)) 0x5a 0xff 0x11 0xde -# CHECK: r17 = or(#21, lsr(r17, #31)) +# CHECK: r17 = or(#21,lsr(r17,#31)) # Shift right by immediate with rounding 0xf0 0xdf 0xd4 0x80 -# CHECK: r17:16 = asr(r21:20, #31):rnd +# CHECK: r17:16 = asr(r21:20,#31):rnd 0x11 0xdf 0x55 0x8c -# CHECK: r17 = asr(r21, #31):rnd +# CHECK: r17 = asr(r21,#31):rnd # Shift left by immediate with saturation 0x51 0xdf 0x55 0x8c -# CHECK: r17 = asl(r21, #31):sat +# CHECK: r17 = asl(r21,#31):sat # Shift by register 0x10 0xdf 0x94 0xc3 -# CHECK: r17:16 = asr(r21:20, r31) +# CHECK: r17:16 = asr(r21:20,r31) 0x50 0xdf 0x94 0xc3 -# CHECK: r17:16 = lsr(r21:20, r31) +# CHECK: r17:16 = lsr(r21:20,r31) 0x90 0xdf 0x94 0xc3 -# CHECK: r17:16 = asl(r21:20, r31) +# CHECK: r17:16 = asl(r21:20,r31) 0xd0 0xdf 0x94 0xc3 -# CHECK: r17:16 = lsl(r21:20, r31) +# CHECK: r17:16 = lsl(r21:20,r31) 0x11 0xdf 0x55 0xc6 -# CHECK: r17 = asr(r21, r31) +# CHECK: r17 = asr(r21,r31) 0x51 0xdf 0x55 0xc6 -# CHECK: r17 = lsr(r21, r31) +# CHECK: r17 = lsr(r21,r31) 0x91 0xdf 0x55 0xc6 -# CHECK: r17 = asl(r21, r31) +# CHECK: r17 = asl(r21,r31) 0xd1 0xdf 0x55 0xc6 -# CHECK: r17 = lsl(r21, r31) +# CHECK: r17 = lsl(r21,r31) 0xf1 0xdf 0x8a 0xc6 -# CHECK: r17 = lsl(#21, r31) +# CHECK: r17 = lsl(#21,r31) # Shift by register and accumulate 0x10 0xdf 0x94 0xcb -# CHECK: r17:16 -= asr(r21:20, r31) +# CHECK: r17:16 -= asr(r21:20,r31) 0x50 0xdf 0x94 0xcb -# CHECK: r17:16 -= lsr(r21:20, r31) +# CHECK: r17:16 -= lsr(r21:20,r31) 0x90 0xdf 0x94 0xcb -# CHECK: r17:16 -= asl(r21:20, r31) +# CHECK: r17:16 -= asl(r21:20,r31) 0xd0 0xdf 0x94 0xcb -# CHECK: r17:16 -= lsl(r21:20, r31) +# CHECK: r17:16 -= lsl(r21:20,r31) 0x10 0xdf 0xd4 0xcb -# CHECK: r17:16 += asr(r21:20, r31) +# CHECK: r17:16 += asr(r21:20,r31) 0x50 0xdf 0xd4 0xcb -# CHECK: r17:16 += lsr(r21:20, r31) +# CHECK: r17:16 += lsr(r21:20,r31) 0x90 0xdf 0xd4 0xcb -# CHECK: r17:16 += asl(r21:20, r31) +# CHECK: r17:16 += asl(r21:20,r31) 0xd0 0xdf 0xd4 0xcb -# CHECK: r17:16 += lsl(r21:20, r31) +# CHECK: r17:16 += lsl(r21:20,r31) 0x11 0xdf 0x95 0xcc -# CHECK: r17 -= asr(r21, r31) +# CHECK: r17 -= asr(r21,r31) 0x51 0xdf 0x95 0xcc -# CHECK: r17 -= lsr(r21, r31) +# CHECK: r17 -= lsr(r21,r31) 0x91 0xdf 0x95 0xcc -# CHECK: r17 -= asl(r21, r31) +# CHECK: r17 -= asl(r21,r31) 0xd1 0xdf 0x95 0xcc -# CHECK: r17 -= lsl(r21, r31) +# CHECK: r17 -= lsl(r21,r31) 0x11 0xdf 0xd5 0xcc -# CHECK: r17 += asr(r21, r31) +# CHECK: r17 += asr(r21,r31) 0x51 0xdf 0xd5 0xcc -# CHECK: r17 += lsr(r21, r31) +# CHECK: r17 += lsr(r21,r31) 0x91 0xdf 0xd5 0xcc -# CHECK: r17 += asl(r21, r31) +# CHECK: r17 += asl(r21,r31) 0xd1 0xdf 0xd5 0xcc -# CHECK: r17 += lsl(r21, r31) +# CHECK: r17 += lsl(r21,r31) # Shift by register and logical 0x10 0xdf 0x14 0xcb -# CHECK: r17:16 |= asr(r21:20, r31) +# CHECK: r17:16 |= asr(r21:20,r31) 0x50 0xdf 0x14 0xcb -# CHECK: r17:16 |= lsr(r21:20, r31) +# CHECK: r17:16 |= lsr(r21:20,r31) 0x90 0xdf 0x14 0xcb -# CHECK: r17:16 |= asl(r21:20, r31) +# CHECK: r17:16 |= asl(r21:20,r31) 0xd0 0xdf 0x14 0xcb -# CHECK: r17:16 |= lsl(r21:20, r31) +# CHECK: r17:16 |= lsl(r21:20,r31) 0x10 0xdf 0x54 0xcb -# CHECK: r17:16 &= asr(r21:20, r31) +# CHECK: r17:16 &= asr(r21:20,r31) 0x50 0xdf 0x54 0xcb -# CHECK: r17:16 &= lsr(r21:20, r31) +# CHECK: r17:16 &= lsr(r21:20,r31) 0x90 0xdf 0x54 0xcb -# CHECK: r17:16 &= asl(r21:20, r31) +# CHECK: r17:16 &= asl(r21:20,r31) 0xd0 0xdf 0x54 0xcb -# CHECK: r17:16 &= lsl(r21:20, r31) +# CHECK: r17:16 &= lsl(r21:20,r31) 0x10 0xdf 0x74 0xcb -# CHECK: r17:16 ^= asr(r21:20, r31) +# CHECK: r17:16 ^= asr(r21:20,r31) 0x50 0xdf 0x74 0xcb -# CHECK: r17:16 ^= lsr(r21:20, r31) +# CHECK: r17:16 ^= lsr(r21:20,r31) 0x90 0xdf 0x74 0xcb -# CHECK: r17:16 ^= asl(r21:20, r31) +# CHECK: r17:16 ^= asl(r21:20,r31) 0xd0 0xdf 0x74 0xcb -# CHECK: r17:16 ^= lsl(r21:20, r31) +# CHECK: r17:16 ^= lsl(r21:20,r31) 0x11 0xdf 0x15 0xcc -# CHECK: r17 |= asr(r21, r31) +# CHECK: r17 |= asr(r21,r31) 0x51 0xdf 0x15 0xcc -# CHECK: r17 |= lsr(r21, r31) +# CHECK: r17 |= lsr(r21,r31) 0x91 0xdf 0x15 0xcc -# CHECK: r17 |= asl(r21, r31) +# CHECK: r17 |= asl(r21,r31) 0xd1 0xdf 0x15 0xcc -# CHECK: r17 |= lsl(r21, r31) +# CHECK: r17 |= lsl(r21,r31) 0x11 0xdf 0x55 0xcc -# CHECK: r17 &= asr(r21, r31) +# CHECK: r17 &= asr(r21,r31) 0x51 0xdf 0x55 0xcc -# CHECK: r17 &= lsr(r21, r31) +# CHECK: r17 &= lsr(r21,r31) 0x91 0xdf 0x55 0xcc -# CHECK: r17 &= asl(r21, r31) +# CHECK: r17 &= asl(r21,r31) 0xd1 0xdf 0x55 0xcc -# CHECK: r17 &= lsl(r21, r31) +# CHECK: r17 &= lsl(r21,r31) # Shift by register with saturation 0x11 0xdf 0x15 0xc6 -# CHECK: r17 = asr(r21, r31):sat +# CHECK: r17 = asr(r21,r31):sat 0x91 0xdf 0x15 0xc6 -# CHECK: r17 = asl(r21, r31):sat +# CHECK: r17 = asl(r21,r31):sat # Vector shift halfwords by immediate 0x10 0xc5 0x94 0x80 -# CHECK: r17:16 = vasrh(r21:20, #5) +# CHECK: r17:16 = vasrh(r21:20,#5) 0x30 0xc5 0x94 0x80 -# CHECK: r17:16 = vlsrh(r21:20, #5) +# CHECK: r17:16 = vlsrh(r21:20,#5) 0x50 0xc5 0x94 0x80 -# CHECK: r17:16 = vaslh(r21:20, #5) +# CHECK: r17:16 = vaslh(r21:20,#5) # Vector arithmetic shift halfwords with round 0x10 0xc5 0x34 0x80 -# CHECK: r17:16 = vasrh(r21:20, #5):raw +# CHECK: r17:16 = vasrh(r21:20,#5):raw # Vector arithmetic shift halfwords with saturate and pack 0x91 0xc5 0x74 0x88 -# CHECK: r17 = vasrhub(r21:20, #5):raw +# CHECK: r17 = vasrhub(r21:20,#5):raw 0xb1 0xc5 0x74 0x88 -# CHECK: r17 = vasrhub(r21:20, #5):sat +# CHECK: r17 = vasrhub(r21:20,#5):sat # Vector shift halfwords by register 0x10 0xdf 0x54 0xc3 -# CHECK: r17:16 = vasrh(r21:20, r31) +# CHECK: r17:16 = vasrh(r21:20,r31) 0x50 0xdf 0x54 0xc3 -# CHECK: r17:16 = vlsrh(r21:20, r31) +# CHECK: r17:16 = vlsrh(r21:20,r31) 0x90 0xdf 0x54 0xc3 -# CHECK: r17:16 = vaslh(r21:20, r31) +# CHECK: r17:16 = vaslh(r21:20,r31) 0xd0 0xdf 0x54 0xc3 -# CHECK: r17:16 = vlslh(r21:20, r31) +# CHECK: r17:16 = vlslh(r21:20,r31) # Vector shift words by immediate 0x10 0xdf 0x54 0x80 -# CHECK: r17:16 = vasrw(r21:20, #31) +# CHECK: r17:16 = vasrw(r21:20,#31) 0x30 0xdf 0x54 0x80 -# CHECK: r17:16 = vlsrw(r21:20, #31) +# CHECK: r17:16 = vlsrw(r21:20,#31) 0x50 0xdf 0x54 0x80 -# CHECK: r17:16 = vaslw(r21:20, #31) +# CHECK: r17:16 = vaslw(r21:20,#31) # Vector shift words by register 0x10 0xdf 0x14 0xc3 -# CHECK: r17:16 = vasrw(r21:20, r31) +# CHECK: r17:16 = vasrw(r21:20,r31) 0x50 0xdf 0x14 0xc3 -# CHECK: r17:16 = vlsrw(r21:20, r31) +# CHECK: r17:16 = vlsrw(r21:20,r31) 0x90 0xdf 0x14 0xc3 -# CHECK: r17:16 = vaslw(r21:20, r31) +# CHECK: r17:16 = vaslw(r21:20,r31) 0xd0 0xdf 0x14 0xc3 -# CHECK: r17:16 = vlslw(r21:20, r31) +# CHECK: r17:16 = vlslw(r21:20,r31) # Vector shift words with truncate and pack 0x51 0xdf 0xd4 0x88 -# CHECK: r17 = vasrw(r21:20, #31) +# CHECK: r17 = vasrw(r21:20,#31) 0x51 0xdf 0x14 0xc5 -# CHECK: r17 = vasrw(r21:20, r31) +# CHECK: r17 = vasrw(r21:20,r31) diff --git a/llvm/test/MC/Hexagon/align.s b/llvm/test/MC/Hexagon/align.s index 01a112392ed..80cebf125ce 100644 --- a/llvm/test/MC/Hexagon/align.s +++ b/llvm/test/MC/Hexagon/align.s @@ -3,7 +3,7 @@ # Verify that the .align directive emits the proper insn packets. { r1 = sub(#1, r1) } -# CHECK: 76414021 { r1 = sub(#1, r1) +# CHECK: 76414021 { r1 = sub(#1,r1) # CHECK-NEXT: 7f004000 nop # CHECK-NEXT: 7f004000 nop # CHECK-NEXT: 7f00c000 nop } @@ -11,8 +11,8 @@ .align 16 { r1 = sub(#1, r1) r2 = sub(#1, r2) } -# CHECK: 76414021 { r1 = sub(#1, r1) -# CHECK-NEXT: 76424022 r2 = sub(#1, r2) +# CHECK: 76414021 { r1 = sub(#1,r1) +# CHECK-NEXT: 76424022 r2 = sub(#1,r2) # CHECK-NEXT: 7f004000 nop # CHECK-NEXT: 7f00c000 nop } @@ -20,7 +20,7 @@ { r1 = sub(#1, r1) r2 = sub(#1, r2) r3 = sub(#1, r3) } -# CHECK: 76434023 r3 = sub(#1, r3) +# CHECK: 76434023 r3 = sub(#1,r3) # CHECK-NEXT: 7f00c000 nop } .align 16 @@ -33,13 +33,13 @@ # CHECK: 9200c020 { r0 = vextract(v0,r0) } r0 = vextract(v0, r0) .align 128 -# CHECK: 76414021 { r1 = sub(#1, r1) +# CHECK: 76414021 { r1 = sub(#1,r1) # CHECK-NEXT: 7f00c000 nop } { r1 = sub(#1, r1) } -#CHECK: { r1 = sub(#1, r1) -#CHECK: r2 = sub(#1, r2) -#CHECK: r3 = sub(#1, r3) } +#CHECK: { r1 = sub(#1,r1) +#CHECK: r2 = sub(#1,r2) +#CHECK: r3 = sub(#1,r3) } .falign .align 8 { r1 = sub(#1, r1) @@ -47,14 +47,14 @@ r0 = vextract(v0, r0) r3 = sub(#1, r3) } # CHECK: { immext(#0) -# CHECK: r0 = sub(##1, r0) +# CHECK: r0 = sub(##1,r0) # CHECK: immext(#0) -# CHECK: r1 = sub(##1, r1) } +# CHECK: r1 = sub(##1,r1) } # CHECK: { nop # CHECK: nop # CHECK: nop } -# CHECK: { r0 = sub(#1, r0) } +# CHECK: { r0 = sub(#1,r0) } { r0 = sub (##1, r0) r1 = sub (##1, r1) } .align 16 -{ r0 = sub (#1, r0) }
\ No newline at end of file +{ r0 = sub (#1, r0) } diff --git a/llvm/test/MC/Hexagon/asmMap.s b/llvm/test/MC/Hexagon/asmMap.s index f9dc0afc47c..4a2ca2499cc 100644 --- a/llvm/test/MC/Hexagon/asmMap.s +++ b/llvm/test/MC/Hexagon/asmMap.s @@ -2,607 +2,607 @@ # Make sure that the assembler mapped instructions are being handled correctly. -#CHECK: 3c56c000 { memw(r22{{ *}}+{{ *}}#0)=#0 +#CHECK: 3c56c000 { memw(r22+#0) = #0 memw(r22)=#0 -#CHECK: 3c23e05f { memh(r3{{ *}}+{{ *}}#0)=#-33 +#CHECK: 3c23e05f { memh(r3+#0) = #-33 memh(r3)=#-33 -#CHECK: 3c07c012 { memb(r7{{ *}}+{{ *}}#0)=#18 +#CHECK: 3c07c012 { memb(r7+#0) = #18 memb(r7)=#18 -#CHECK: 4101c008 { if (p0) r8 = memb(r1{{ *}}+{{ *}}#0) +#CHECK: 4101c008 { if (p0) r8 = memb(r1+#0) if (p0) r8=memb(r1) -#CHECK: 4519d817 { if (!p3) r23 = memb(r25{{ *}}+{{ *}}#0) +#CHECK: 4519d817 { if (!p3) r23 = memb(r25+#0) if (!p3) r23=memb(r25) -#CHECK: 412dc002 { if (p0) r2 = memub(r13{{ *}}+{{ *}}#0) +#CHECK: 412dc002 { if (p0) r2 = memub(r13+#0) if (p0) r2=memub(r13) -#CHECK: 453cc01a { if (!p0) r26 = memub(r28{{ *}}+{{ *}}#0) +#CHECK: 453cc01a { if (!p0) r26 = memub(r28+#0) if (!p0) r26=memub(r28) -#CHECK: 416bc818 { if (p1) r24 = memuh(r11{{ *}}+{{ *}}#0) +#CHECK: 416bc818 { if (p1) r24 = memuh(r11+#0) if (p1) r24=memuh(r11) -#CHECK: 457fc012 { if (!p0) r18 = memuh(r31{{ *}}+{{ *}}#0) +#CHECK: 457fc012 { if (!p0) r18 = memuh(r31+#0) if (!p0) r18=memuh(r31) -#CHECK: 455dc014 { if (!p0) r20 = memh(r29{{ *}}+{{ *}}#0) +#CHECK: 455dc014 { if (!p0) r20 = memh(r29+#0) if (!p0) r20=memh(r29) -#CHECK: 415dc01d { if (p0) r29 = memh(r29{{ *}}+{{ *}}#0) +#CHECK: 415dc01d { if (p0) r29 = memh(r29+#0) if (p0) r29=memh(r29) -#CHECK: 4583c01d { if (!p0) r29 = memw(r3{{ *}}+{{ *}}#0) +#CHECK: 4583c01d { if (!p0) r29 = memw(r3+#0) if (!p0) r29=memw(r3) -#CHECK: 419bd01e { if (p2) r30 = memw(r27{{ *}}+{{ *}}#0) +#CHECK: 419bd01e { if (p2) r30 = memw(r27+#0) if (p2) r30=memw(r27) -#CHECK: 90e2c018 { r25:24 = membh(r2{{ *}}+{{ *}}#0) +#CHECK: 90e2c018 { r25:24 = membh(r2+#0) r25:24=membh(r2) -#CHECK: 902bc006 { r6 = membh(r11{{ *}}+{{ *}}#0) +#CHECK: 902bc006 { r6 = membh(r11+#0) r6=membh(r11) -#CHECK: 90a2c01c { r29:28 = memubh(r2{{ *}}+{{ *}}#0) +#CHECK: 90a2c01c { r29:28 = memubh(r2+#0) r29:28=memubh(r2) -#CHECK: 906ec00d { r13 = memubh(r14{{ *}}+{{ *}}#0) +#CHECK: 906ec00d { r13 = memubh(r14+#0) r13=memubh(r14) -#CHECK: 91dac00c { r13:12 = memd(r26{{ *}}+{{ *}}#0) +#CHECK: 91dac00c { r13:12 = memd(r26+#0) r13:12=memd(r26) -#CHECK: 919bc004 { r4 = memw(r27{{ *}}+{{ *}}#0) +#CHECK: 919bc004 { r4 = memw(r27+#0) r4=memw(r27) -#CHECK: 914cc005 { r5 = memh(r12{{ *}}+{{ *}}#0) +#CHECK: 914cc005 { r5 = memh(r12+#0) r5=memh(r12) -#CHECK: 9176c010 { r16 = memuh(r22{{ *}}+{{ *}}#0) +#CHECK: 9176c010 { r16 = memuh(r22+#0) r16=memuh(r22) -#CHECK: 910bc017 { r23 = memb(r11{{ *}}+{{ *}}#0) +#CHECK: 910bc017 { r23 = memb(r11+#0) r23=memb(r11) -#CHECK: 912bc01b { r27 = memub(r11{{ *}}+{{ *}}#0) +#CHECK: 912bc01b { r27 = memub(r11+#0) r27=memub(r11) -#CHECK: 404ede01 { if (p1) memh(r14{{ *}}+{{ *}}#0) = r30 +#CHECK: 404ede01 { if (p1) memh(r14+#0) = r30 if (p1) memh(r14)=r30 -#CHECK: 4449d900 { if (!p0) memh(r9{{ *}}+{{ *}}#0) = r25 +#CHECK: 4449d900 { if (!p0) memh(r9+#0) = r25 if (!p0) memh(r9)=r25 -#CHECK: 400ecd00 { if (p0) memb(r14{{ *}}+{{ *}}#0) = r13 +#CHECK: 400ecd00 { if (p0) memb(r14+#0) = r13 if (p0) memb(r14)=r13 -#CHECK: 440bcc01 { if (!p1) memb(r11{{ *}}+{{ *}}#0) = r12 +#CHECK: 440bcc01 { if (!p1) memb(r11+#0) = r12 if (!p1) memb(r11)=r12 -#CHECK: 41d0d804 { if (p3) r5:4 = memd(r16{{ *}}+{{ *}}#0) +#CHECK: 41d0d804 { if (p3) r5:4 = memd(r16+#0) if (p3) r5:4=memd(r16) -#CHECK: 45d9c00c { if (!p0) r13:12 = memd(r25{{ *}}+{{ *}}#0) +#CHECK: 45d9c00c { if (!p0) r13:12 = memd(r25+#0) if (!p0) r13:12=memd(r25) -#CHECK: 385ee06d { if (p3) memw(r30{{ *}}+{{ *}}#0)=#-19 +#CHECK: 385ee06d { if (p3) memw(r30+#0) = #-19 if (p3) memw(r30)=#-19 -#CHECK: 38c6c053 { if (!p2) memw(r6{{ *}}+{{ *}}#0)=#19 +#CHECK: 38c6c053 { if (!p2) memw(r6+#0) = #19 if (!p2) memw(r6)=#19 -#CHECK: 381fc034 { if (p1) memb(r31{{ *}}+{{ *}}#0)=#20 +#CHECK: 381fc034 { if (p1) memb(r31+#0) = #20 if (p1) memb(r31)=#20 -#CHECK: 389dc010 { if (!p0) memb(r29{{ *}}+{{ *}}#0)=#16 +#CHECK: 389dc010 { if (!p0) memb(r29+#0) = #16 if (!p0) memb(r29)=#16 -#CHECK: 3833e019 { if (p0) memh(r19{{ *}}+{{ *}}#0)=#-7 +#CHECK: 3833e019 { if (p0) memh(r19+#0) = #-7 if (p0) memh(r19)=#-7 -#CHECK: 38b7c013 { if (!p0) memh(r23{{ *}}+{{ *}}#0)=#19 +#CHECK: 38b7c013 { if (!p0) memh(r23+#0) = #19 if (!p0) memh(r23)=#19 -#CHECK: 4488d401 { if (!p1) memw(r8{{ *}}+{{ *}}#0) = r20 +#CHECK: 4488d401 { if (!p1) memw(r8+#0) = r20 if (!p1) memw(r8)=r20 -#CHECK: 409ddc02 { if (p2) memw(r29{{ *}}+{{ *}}#0) = r28 +#CHECK: 409ddc02 { if (p2) memw(r29+#0) = r28 if (p2) memw(r29)=r28 -#CHECK: 446fc301 { if (!p1) memh(r15{{ *}}+{{ *}}#0) = r3.h +#CHECK: 446fc301 { if (!p1) memh(r15+#0) = r3.h if (!p1) memh(r15)=r3.h -#CHECK: 406dc201 { if (p1) memh(r13{{ *}}+{{ *}}#0) = r2.h +#CHECK: 406dc201 { if (p1) memh(r13+#0) = r2.h if (p1) memh(r13)=r2.h -#CHECK: 40d9c601 { if (p1) memd(r25{{ *}}+{{ *}}#0) = r7:6 +#CHECK: 40d9c601 { if (p1) memd(r25+#0) = r7:6 if (p1) memd(r25)=r7:6 -#CHECK: 44dad803 { if (!p3) memd(r26{{ *}}+{{ *}}#0) = r25:24 +#CHECK: 44dad803 { if (!p3) memd(r26+#0) = r25:24 if (!p3) memd(r26)=r25:24 -#CHECK: 3e21c011 { memh(r1{{ *}}+{{ *}}#0) {{ *}}+={{ *}} r17 +#CHECK: 3e21c011 { memh(r1+#0) += r17 memh(r1)+=r17 -#CHECK: 3e4fc019 { memw(r15{{ *}}+{{ *}}#0) {{ *}}+={{ *}} r25 +#CHECK: 3e4fc019 { memw(r15+#0) += r25 memw(r15)+=r25 -#CHECK: 3e5dc022 { memw(r29{{ *}}+{{ *}}#0) {{ *}}-={{ *}} r2 +#CHECK: 3e5dc022 { memw(r29+#0) -= r2 memw(r29)-=r2 -#CHECK: 3e04c004 { memb(r4{{ *}}+{{ *}}#0) {{ *}}+={{ *}} r4 +#CHECK: 3e04c004 { memb(r4+#0) += r4 memb(r4)+=r4 -#CHECK: 3f53c016 { memw(r19{{ *}}+{{ *}}#0){{ *}}{{ *}}+={{ *}}{{ *}}#22 +#CHECK: 3f53c016 { memw(r19+#0) += #22 memw(r19)+=#22 -#CHECK: 3f24c01e { memh(r4{{ *}}+{{ *}}#0){{ *}}{{ *}}+={{ *}}{{ *}}#30 +#CHECK: 3f24c01e { memh(r4+#0) += #30 memh(r4)+=#30 -#CHECK: 3e27c02d { memh(r7{{ *}}+{{ *}}#0) {{ *}}-={{ *}} r13 +#CHECK: 3e27c02d { memh(r7+#0) -= r13 memh(r7)-=r13 -#CHECK: 3e1ec032 { memb(r30{{ *}}+{{ *}}#0) {{ *}}-={{ *}} r18 +#CHECK: 3e1ec032 { memb(r30+#0) -= r18 memb(r30)-=r18 -#CHECK: 3e49c05b { memw(r9{{ *}}+{{ *}}#0) &= r27 +#CHECK: 3e49c05b { memw(r9+#0) &= r27 memw(r9)&=r27 -#CHECK: 3e2dc040 { memh(r13{{ *}}+{{ *}}#0) &= r0 +#CHECK: 3e2dc040 { memh(r13+#0) &= r0 memh(r13)&=r0 -#CHECK: 3e05c046 { memb(r5{{ *}}+{{ *}}#0) &= r6 +#CHECK: 3e05c046 { memb(r5+#0) &= r6 memb(r5)&=r6 -#CHECK: 3e45c06a { memw(r5{{ *}}+{{ *}}#0) |= r10 +#CHECK: 3e45c06a { memw(r5+#0) |= r10 memw(r5)|=r10 -#CHECK: 3e21c07e { memh(r1{{ *}}+{{ *}}#0) |= r30 +#CHECK: 3e21c07e { memh(r1+#0) |= r30 memh(r1)|=r30 -#CHECK: 3e09c06f { memb(r9{{ *}}+{{ *}}#0) |= r15 +#CHECK: 3e09c06f { memb(r9+#0) |= r15 memb(r9)|=r15 -#CHECK: a157d100 { memh(r23{{ *}}+{{ *}}#0) = r17 +#CHECK: a157d100 { memh(r23+#0) = r17 memh(r23)=r17 -#CHECK: a10fd400 { memb(r15{{ *}}+{{ *}}#0) = r20 +#CHECK: a10fd400 { memb(r15+#0) = r20 memb(r15)=r20 -#CHECK: 9082c014 { r21:20 = memb_fifo(r2{{ *}}+{{ *}}#0) +#CHECK: 9082c014 { r21:20 = memb_fifo(r2+#0) r21:20=memb_fifo(r2) -#CHECK: 9056c01c { r29:28 = memh_fifo(r22{{ *}}+{{ *}}#0) +#CHECK: 9056c01c { r29:28 = memh_fifo(r22+#0) r29:28=memh_fifo(r22) -#CHECK: a1d8ca00 { memd(r24{{ *}}+{{ *}}#0) = r11:10 +#CHECK: a1d8ca00 { memd(r24+#0) = r11:10 memd(r24)=r11:10 -#CHECK: a19ed900 { memw(r30{{ *}}+{{ *}}#0) = r25 +#CHECK: a19ed900 { memw(r30+#0) = r25 memw(r30)=r25 -#CHECK: a169ce00 { memh(r9{{ *}}+{{ *}}#0) = r14.h +#CHECK: a169ce00 { memh(r9+#0) = r14.h memh(r9)=r14.h -#CHECK: 3f07c06b { memb(r7{{ *}}+{{ *}}#0) = setbit(#11) +#CHECK: 3f07c06b { memb(r7+#0) = setbit(#11) memb(r7)=setbit(#11) -#CHECK: 3f34c07b { memh(r20{{ *}}+{{ *}}#0) = setbit(#27) +#CHECK: 3f34c07b { memh(r20+#0) = setbit(#27) memh(r20)=setbit(#27) -#CHECK: 3f1cc032 { memb(r28{{ *}}+{{ *}}#0){{ *}}-={{ *}}#18 +#CHECK: 3f1cc032 { memb(r28+#0) -= #18 memb(r28)-=#18 -#CHECK: 3f29c02a { memh(r9{{ *}}+{{ *}}#0){{ *}}-={{ *}}#10 +#CHECK: 3f29c02a { memh(r9+#0) -= #10 memh(r9)-=#10 -#CHECK: 3f4cc026 { memw(r12{{ *}}+{{ *}}#0){{ *}}-={{ *}}#6 +#CHECK: 3f4cc026 { memw(r12+#0) -= #6 memw(r12)-=#6 -#CHECK: 3f00c00c { memb(r0{{ *}}+{{ *}}#0){{ *}}+={{ *}}#12 +#CHECK: 3f00c00c { memb(r0+#0) += #12 memb(r0)+=#12 -#CHECK: 3f50c07a { memw(r16{{ *}}+{{ *}}#0) = setbit(#26) +#CHECK: 3f50c07a { memw(r16+#0) = setbit(#26) memw(r16)=setbit(#26) -#CHECK: 3f1fc05d { memb(r31{{ *}}+{{ *}}#0) = clrbit(#29) +#CHECK: 3f1fc05d { memb(r31+#0) = clrbit(#29) memb(r31)=clrbit(#29) -#CHECK: 3f20c05e { memh(r0{{ *}}+{{ *}}#0) = clrbit(#30) +#CHECK: 3f20c05e { memh(r0+#0) = clrbit(#30) memh(r0)=clrbit(#30) -#CHECK: 3f42c059 { memw(r2{{ *}}+{{ *}}#0) = clrbit(#25) +#CHECK: 3f42c059 { memw(r2+#0) = clrbit(#25) memw(r2)=clrbit(#25) -#CHECK: 39cfe072 if (!p3.new) memw(r15{{ *}}+{{ *}}#0)=#-14 +#CHECK: 39cfe072 if (!p3.new) memw(r15+#0) = #-14 { p3=cmp.eq(r5,##-1997506977) if (!p3.new) memw(r15)=#-14 } -#CHECK: 3959e06b if (p3.new) memw(r25{{ *}}+{{ *}}#0)=#-21 +#CHECK: 3959e06b if (p3.new) memw(r25+#0) = #-21 { p3=cmp.eq(r0,##1863618461) if (p3.new) memw(r25)=#-21 } -#CHECK: 4312c801 if (p1.new) r1 = memb(r18{{ *}}+{{ *}}#0) +#CHECK: 4312c801 if (p1.new) r1 = memb(r18+#0) { if (p1.new) r1=memb(r18) p1=cmp.eq(r23,##-1105571618) } -#CHECK: 4718d803 if (!p3.new) r3 = memb(r24{{ *}}+{{ *}}#0) +#CHECK: 4718d803 if (!p3.new) r3 = memb(r24+#0) { if (!p3.new) r3=memb(r24) p3=cmp.eq(r3,##-210870878) } -#CHECK: 4326c81b if (p1.new) r27 = memub(r6{{ *}}+{{ *}}#0) +#CHECK: 4326c81b if (p1.new) r27 = memub(r6+#0) { if (p1.new) r27=memub(r6) p1=cmp.eq(r29,##-188410493) } -#CHECK: 473ad00d if (!p2.new) r13 = memub(r26{{ *}}+{{ *}}#0) +#CHECK: 473ad00d if (!p2.new) r13 = memub(r26+#0) { p2=cmp.eq(r30,##-1823852150) if (!p2.new) r13=memub(r26) } -#CHECK: 4785d80e if (!p3.new) r14 = memw(r5{{ *}}+{{ *}}#0) +#CHECK: 4785d80e if (!p3.new) r14 = memw(r5+#0) { if (!p3.new) r14=memw(r5) p3=cmp.eq(r31,##-228524711) } -#CHECK: 438cc81a if (p1.new) r26 = memw(r12{{ *}}+{{ *}}#0) +#CHECK: 438cc81a if (p1.new) r26 = memw(r12+#0) { if (p1.new) r26=memw(r12) p1=cmp.eq(r11,##-485232313) } -#CHECK: 477dc019 if (!p0.new) r25 = memuh(r29{{ *}}+{{ *}}#0) +#CHECK: 477dc019 if (!p0.new) r25 = memuh(r29+#0) { p0=cmp.eq(r23,##127565957) if (!p0.new) r25=memuh(r29) } -#CHECK: 4377c807 if (p1.new) r7 = memuh(r23{{ *}}+{{ *}}#0) +#CHECK: 4377c807 if (p1.new) r7 = memuh(r23+#0) { p1=cmp.eq(r30,##-222020054) if (p1.new) r7=memuh(r23) } -#CHECK: 4754c81c if (!p1.new) r28 = memh(r20{{ *}}+{{ *}}#0) +#CHECK: 4754c81c if (!p1.new) r28 = memh(r20+#0) { p1=cmp.eq(r18,##1159699785) if (!p1.new) r28=memh(r20) } -#CHECK: 435ec01b if (p0.new) r27 = memh(r30{{ *}}+{{ *}}#0) +#CHECK: 435ec01b if (p0.new) r27 = memh(r30+#0) { p0=cmp.eq(r7,##-1114567705) if (p0.new) r27=memh(r30) } -#CHECK: 420dd100 if (p0.new) memb(r13{{ *}}+{{ *}}#0) = r17 +#CHECK: 420dd100 if (p0.new) memb(r13+#0) = r17 { p0=cmp.eq(r21,##-1458796638) if (p0.new) memb(r13)=r17 } -#CHECK: 4601d602 if (!p2.new) memb(r1{{ *}}+{{ *}}#0) = r22 +#CHECK: 4601d602 if (!p2.new) memb(r1+#0) = r22 { p2=cmp.eq(r20,##-824022439) if (!p2.new) memb(r1)=r22 } -#CHECK: 43dcd808 if (p3.new) r9:8 = memd(r28{{ *}}+{{ *}}#0) +#CHECK: 43dcd808 if (p3.new) r9:8 = memd(r28+#0) { p3=cmp.eq(r13,##56660744) if (p3.new) r9:8=memd(r28) } -#CHECK: 47d8c80e if (!p1.new) r15:14 = memd(r24{{ *}}+{{ *}}#0) +#CHECK: 47d8c80e if (!p1.new) r15:14 = memd(r24+#0) { if (!p1.new) r15:14=memd(r24) p1=cmp.eq(r15,##1536716489) } -#CHECK: 3918e045 if (p2.new) memb(r24{{ *}}+{{ *}}#0)=#-27 +#CHECK: 3918e045 if (p2.new) memb(r24+#0) = #-27 { if (p2.new) memb(r24)=#-27 p2=cmp.eq(r21,##1741091811) } -#CHECK: 398fe04d if (!p2.new) memb(r15{{ *}}+{{ *}}#0)=#-19 +#CHECK: 398fe04d if (!p2.new) memb(r15+#0) = #-19 { if (!p2.new) memb(r15)=#-19 p2=cmp.eq(r15,##779870261) } -#CHECK: 3931c04b if (p2.new) memh(r17{{ *}}+{{ *}}#0)=#11 +#CHECK: 3931c04b if (p2.new) memh(r17+#0) = #11 { if (p2.new) memh(r17)=#11 p2=cmp.eq(r13,##-1171145798) } -#CHECK: 39aee056 if (!p2.new) memh(r14{{ *}}+{{ *}}#0)=#-10 +#CHECK: 39aee056 if (!p2.new) memh(r14+#0) = #-10 { p2=cmp.eq(r23,##-633976762) if (!p2.new) memh(r14)=#-10 } -#CHECK: 4692df01 if (!p1.new) memw(r18{{ *}}+{{ *}}#0) = r31 +#CHECK: 4692df01 if (!p1.new) memw(r18+#0) = r31 { if (!p1.new) memw(r18)=r31 p1=cmp.eq(r11,##-319375732) } -#CHECK: 428dc402 if (p2.new) memw(r13{{ *}}+{{ *}}#0) = r4 +#CHECK: 428dc402 if (p2.new) memw(r13+#0) = r4 { if (p2.new) memw(r13)=r4 p2=cmp.eq(r18,##1895120239) } -#CHECK: 4670c300 if (!p0.new) memh(r16{{ *}}+{{ *}}#0) = r3.h +#CHECK: 4670c300 if (!p0.new) memh(r16+#0) = r3.h { p0=cmp.eq(r25,##1348715015) if (!p0.new) memh(r16)=r3.h } -#CHECK: 426ddf02 if (p2.new) memh(r13{{ *}}+{{ *}}#0) = r31.h +#CHECK: 426ddf02 if (p2.new) memh(r13+#0) = r31.h { p2=cmp.eq(r25,##1085560657) if (p2.new) memh(r13)=r31.h } -#CHECK: 464bcb01 if (!p1.new) memh(r11{{ *}}+{{ *}}#0) = r11 +#CHECK: 464bcb01 if (!p1.new) memh(r11+#0) = r11 { p1=cmp.eq(r10,##1491455911) if (!p1.new) memh(r11)=r11 } -#CHECK: 4248d200 if (p0.new) memh(r8{{ *}}+{{ *}}#0) = r18 +#CHECK: 4248d200 if (p0.new) memh(r8+#0) = r18 { p0=cmp.eq(r3,##687581160) if (p0.new) memh(r8)=r18 } -#CHECK: 42deca00 if (p0.new) memd(r30{{ *}}+{{ *}}#0) = r11:10 +#CHECK: 42deca00 if (p0.new) memd(r30+#0) = r11:10 { if (p0.new) memd(r30)=r11:10 p0=cmp.eq(r28,##562796189) } -#CHECK: 46d5cc03 if (!p3.new) memd(r21{{ *}}+{{ *}}#0) = r13:12 +#CHECK: 46d5cc03 if (!p3.new) memd(r21+#0) = r13:12 { if (!p3.new) memd(r21)=r13:12 p3=cmp.eq(r6,##-969273288) } -#CHECK: 42bad201 if (p1.new) memw(r26{{ *}}+{{ *}}#0) = r22.new +#CHECK: 42bad201 if (p1.new) memw(r26+#0) = r22.new { if (p1.new) memw(r26)=r22.new p1=cmp.eq(r0,##-1110065473) r22=add(r28,r9) } -#CHECK: 46b9d201 if (!p1.new) memw(r25{{ *}}+{{ *}}#0) = r26.new +#CHECK: 46b9d201 if (!p1.new) memw(r25+#0) = r26.new { p1=cmp.eq(r11,##-753121346) r26=add(r19,r7) if (!p1.new) memw(r25)=r26.new } -#CHECK: 40aad200 if (p0) memw(r10{{ *}}+{{ *}}#0) = r6.new +#CHECK: 40aad200 if (p0) memw(r10+#0) = r6.new { r6=add(r30,r0) if (p0) memw(r10)=r6.new } -#CHECK: 44a6d202 if (!p2) memw(r6{{ *}}+{{ *}}#0) = r4.new +#CHECK: 44a6d202 if (!p2) memw(r6+#0) = r4.new { if (!p2) memw(r6)=r4.new r4=add(r0,r3) } -#CHECK: 40b9c200 if (p0) memb(r25{{ *}}+{{ *}}#0) = r29.new +#CHECK: 40b9c200 if (p0) memb(r25+#0) = r29.new { if (p0) memb(r25)=r29.new r29=add(r27,r30) } -#CHECK: 44bec203 if (!p3) memb(r30{{ *}}+{{ *}}#0) = r8.new +#CHECK: 44bec203 if (!p3) memb(r30+#0) = r8.new { if (!p3) memb(r30)=r8.new r8=add(r24,r4) } -#CHECK: 46aecc01 if (!p1.new) memh(r14{{ *}}+{{ *}}#0) = r13.new +#CHECK: 46aecc01 if (!p1.new) memh(r14+#0) = r13.new { if (!p1.new) memh(r14)=r13.new r13=add(r21,r2) p1=cmp.eq(r3,##-1529345886) } -#CHECK: 42bcca02 if (p2.new) memh(r28{{ *}}+{{ *}}#0) = r18.new +#CHECK: 42bcca02 if (p2.new) memh(r28+#0) = r18.new { p2=cmp.eq(r15,##2048545649) if (p2.new) memh(r28)=r18.new r18=add(r9,r3) } -#CHECK: 46aac200 if (!p0.new) memb(r10{{ *}}+{{ *}}#0) = r30.new +#CHECK: 46aac200 if (!p0.new) memb(r10+#0) = r30.new { p0=cmp.eq(r21,##-1160401822) r30=add(r9,r22) if (!p0.new) memb(r10)=r30.new } -#CHECK: 42b8c202 if (p2.new) memb(r24{{ *}}+{{ *}}#0) = r11.new +#CHECK: 42b8c202 if (p2.new) memb(r24+#0) = r11.new { if (p2.new) memb(r24)=r11.new p2=cmp.eq(r30,##1267977346) r11=add(r8,r18) } -#CHECK: 44a3ca00 if (!p0) memh(r3{{ *}}+{{ *}}#0) = r28.new +#CHECK: 44a3ca00 if (!p0) memh(r3+#0) = r28.new { r28=add(r16,r11) if (!p0) memh(r3)=r28.new } -#CHECK: 40abca03 if (p3) memh(r11{{ *}}+{{ *}}#0) = r24.new +#CHECK: 40abca03 if (p3) memh(r11+#0) = r24.new { if (p3) memh(r11)=r24.new r24=add(r18,r19) } -#CHECK: a1abd200 memw(r11{{ *}}+{{ *}}#0) = r5.new +#CHECK: a1abd200 memw(r11+#0) = r5.new { memw(r11)=r5.new r5=add(r0,r10) } -#CHECK: a1a2ca00 memh(r2{{ *}}+{{ *}}#0) = r18.new +#CHECK: a1a2ca00 memh(r2+#0) = r18.new { r18=add(r27,r18) memh(r2)=r18.new } -#CHECK: a1bac200 memb(r26{{ *}}+{{ *}}#0) = r15.new +#CHECK: a1bac200 memb(r26+#0) = r15.new { r15=add(r22,r17) memb(r26)=r15.new } -#CHECK: d328ce1c { r29:28{{ *}}={{ *}}vsubub(r15:14, r9:8) +#CHECK: d328ce1c { r29:28 = vsubub(r15:14,r9:8) r29:28=vsubb(r15:14,r9:8) -#CHECK: 8c5ed60c { r12{{ *}}={{ *}}asr(r30, #22):rnd +#CHECK: 8c5ed60c { r12 = asr(r30,#22):rnd r12=asrrnd(r30,#23) -#CHECK: ed1ec109 { r9{{ *}}={{ *}}mpyi(r30, r1) +#CHECK: ed1ec109 { r9 = mpyi(r30,r1) r9=mpyui(r30,r1) -#CHECK: e010d787 { r7{{ *}}={{ *}}+{{ *}}mpyi(r16, #188) +#CHECK: e010d787 { r7 = +mpyi(r16,#188) r7=mpyi(r16,#188) -#CHECK: d206eea2 { p2{{ *}}={{ *}}boundscheck(r7:6, r15:14):raw:hi +#CHECK: d206eea2 { p2 = boundscheck(r7:6,r15:14):raw:hi p2=boundscheck(r7,r15:14) -#CHECK: f27ac102 { p2{{ *}}={{ *}}cmp.gtu(r26, r1) +#CHECK: f27ac102 { p2 = cmp.gtu(r26,r1) p2=cmp.ltu(r1,r26) -#CHECK: f240df00 { p0{{ *}}={{ *}}cmp.gt(r0, r31) +#CHECK: f240df00 { p0 = cmp.gt(r0,r31) p0=cmp.lt(r31,r0) -#CHECK: 7586cc01 { p1{{ *}}={{ *}}cmp.gtu(r6, #96) +#CHECK: 7586cc01 { p1 = cmp.gtu(r6,#96) p1=cmp.geu(r6,#97) -#CHECK: 755dc9a2 { p2{{ *}}={{ *}}cmp.gt(r29, #77) +#CHECK: 755dc9a2 { p2 = cmp.gt(r29,#77) p2=cmp.ge(r29,#78) -#CHECK: d310d60a { r11:10{{ *}}={{ *}}vaddub(r17:16, r23:22) +#CHECK: d310d60a { r11:10 = vaddub(r17:16,r23:22) r11:10=vaddb(r17:16,r23:22) -#CHECK: 8753d1e6 { r6{{ *}}={{ *}}tableidxh(r19, #7, #17):raw +#CHECK: 8753d1e6 { r6 = tableidxh(r19,#7,#17):raw r6=tableidxh(r19,#7,#18) -#CHECK: 8786d277 { r23{{ *}}={{ *}}tableidxw(r6, #3, #18):raw +#CHECK: 8786d277 { r23 = tableidxw(r6,#3,#18):raw r23=tableidxw(r6,#3,#20) -#CHECK: 7c4dfff8 { r25:24{{ *}}={{ *}}combine(#-1, #-101) +#CHECK: 7c4dfff8 { r25:24 = combine(#-1,#-101) r25:24=#-101 -#CHECK: 8866c09a { r26{{ *}}={{ *}}vasrhub(r7:6, #0):raw +#CHECK: 8866c09a { r26 = vasrhub(r7:6,#0):raw r26=vasrhub(r7:6,#1):rnd:sat -#CHECK: 7654c016 { r22{{ *}}={{ *}}sub(#0, r20) +#CHECK: 7654c016 { r22 = sub(#0,r20) r22=neg(r20) -#CHECK: 802cc808 { r9:8{{ *}}={{ *}}vasrh(r13:12, #8):raw +#CHECK: 802cc808 { r9:8 = vasrh(r13:12,#8):raw r9:8=vasrh(r13:12,#9):rnd -#CHECK: 7614dfe5 { r5{{ *}}={{ *}}{{zxtb\(r20\)|and\(r20, *#255\)}} +#CHECK: 7614dfe5 { r5 = {{zxtb\(r20\)|and\(r20,#255\)}} r5=zxtb(r20) #CHECK: 00ab68e2 immext(#179976320) -#CHECK: 7500c500 p0{{ *}}={{ *}}cmp.eq(r0, ##179976360) +#CHECK: 7500c500 p0 = cmp.eq(r0,##179976360) { if (p0.new) r11=r26 p0=cmp.eq(r0,##179976360) } -#CHECK: 74f9c00f { if (!p3) r15{{ *}} ={{ *}}add(r25, #0) +#CHECK: 74f9c00f { if (!p3) r15 = add(r25,#0) if (!p3) r15=r25 -#CHECK: 7425c005 { if (p1) r5{{ *}}={{ *}}add(r5, #0) +#CHECK: 7425c005 { if (p1) r5 = add(r5,#0) if (p1) r5=r5 -#CHECK: e9badae2 { r2{{ *}}={{ *}}vrcmpys(r27:26, r27:26):<<1:rnd:sat:raw:lo +#CHECK: e9badae2 { r2 = vrcmpys(r27:26,r27:26):<<1:rnd:sat:raw:lo r2=vrcmpys(r27:26,r26):<<1:rnd:sat -#CHECK: fd13f20e if (p0.new) r15:14{{ *}}={{ *}}{{r19:18|combine\(r19, *r18\)}} +#CHECK: fd13f20e if (p0.new) r15:14 = {{r19:18|combine\(r19,r18\)}} { p0=cmp.eq(r26,##1766934387) if (p0.new) r15:14=r19:18 } -#CHECK: fd07c6c2 { if (!p2) r3:2{{ *}}={{ *}}{{r7:6|combine\(r7, *r6\)}} +#CHECK: fd07c6c2 { if (!p2) r3:2 = {{r7:6|combine\(r7,r6\)}} if (!p2) r3:2=r7:6 -#CHECK: fd0dcc7e { if (p3) r31:30{{ *}}={{ *}}{{r13:12|combine\(r13, *r12\)}} +#CHECK: fd0dcc7e { if (p3) r31:30 = {{r13:12|combine\(r13,r12\)}} if (p3) r31:30=r13:12 -#CHECK: 748ae015 if (!p0.new) r21{{ *}}={{ *}}add(r10, #0) +#CHECK: 748ae015 if (!p0.new) r21 = add(r10,#0) { p0=cmp.eq(r23,##805633208) if (!p0.new) r21=r10 } -#CHECK: d36ec6c8 { r9:8{{ *}}={{ *}}add(r15:14, r7:6):raw:lo +#CHECK: d36ec6c8 { r9:8 = add(r15:14,r7:6):raw:lo r9:8=add(r14,r7:6) #CHECK: 01e65477 immext(#509943232) -#CHECK: 7516c3a3 p3{{ *}}={{ *}}cmp.eq(r22, ##509943261) +#CHECK: 7516c3a3 p3 = cmp.eq(r22,##509943261) { - if (!p3.new) r9:8=r25:24 + if (!p3.new) r9:8 = r25:24 p3=cmp.eq(r22,##509943261) } -#CHECK: 87e0d5e5 { r5{{ *}}={{ *}}tableidxd(r0, #15, #21):raw +#CHECK: 87e0d5e5 { r5 = tableidxd(r0,#15,#21):raw r5=tableidxd(r0,#15,#24) -#CHECK: 8701db65 { r5{{ *}}={{ *}}tableidxb(r1, #3, #27):raw +#CHECK: 8701db65 { r5 = tableidxb(r1,#3,#27):raw r5=tableidxb(r1,#3,#27) -#CHECK: 767affe3 { r3{{ *}}={{ *}}sub(#-1, r26) +#CHECK: 767affe3 { r3 = sub(#-1,r26) r3=not(r26) -#CHECK: f51ddc06 { r7:6{{ *}}={{ *}}{{r29:28|combine\(r29, *r28\)}} +#CHECK: f51ddc06 { r7:6 = {{r29:28|combine\(r29,r28\)}} r7:6=r29:28 -#CHECK: 9406c000 { dcfetch(r6 + #0) +#CHECK: 9406c000 { dcfetch(r6+#0) dcfetch(r6) -#CHECK: 6b20c001 { p1{{ *}}={{ *}}or(p0, p0) +#CHECK: 6b20c001 { p1 = or(p0,p0) p1=p0 -#CHECK: eafcdc82 { r3:2 += vrcmpys(r29:28, r29:28):<<1:sat:raw:lo +#CHECK: eafcdc82 { r3:2 += vrcmpys(r29:28,r29:28):<<1:sat:raw:lo r3:2+=vrcmpys(r29:28,r28):<<1:sat -#CHECK: e8ead092 { r19:18{{ *}}={{ *}}vrcmpys(r11:10, r17:16):<<1:sat:raw:lo +#CHECK: e8ead092 { r19:18 = vrcmpys(r11:10,r17:16):<<1:sat:raw:lo r19:18=vrcmpys(r11:10,r16):<<1:sat -#CHECK: 9082c014 { r21:20{{ *}}={{ *}}memb_fifo(r2{{ *}}+{{ *}}#0) +#CHECK: 9082c014 { r21:20 = memb_fifo(r2+#0) r21:20=memb_fifo(r2) -#CHECK: 9056c01c { r29:28{{ *}}={{ *}}memh_fifo(r22{{ *}}+{{ *}}#0) +#CHECK: 9056c01c { r29:28 = memh_fifo(r22+#0) r29:28=memh_fifo(r22) diff --git a/llvm/test/MC/Hexagon/capitalizedEndloop.s b/llvm/test/MC/Hexagon/capitalizedEndloop.s index d20ff34de6f..c7a25d9fb27 100644 --- a/llvm/test/MC/Hexagon/capitalizedEndloop.s +++ b/llvm/test/MC/Hexagon/capitalizedEndloop.s @@ -15,7 +15,7 @@ { R0 = mpyi(R0,R0) } : ENDLOOP0 : ENDLOOP1 { R0 = mpyi(R0,R0) }:endloop0:endloop1 -# CHECK: r0 = mpyi(r0, r0) +# CHECK: r0 = mpyi(r0,r0) # CHECK: :endloop0 # CHECK: :endloop0 # CHECK: :endloop0 diff --git a/llvm/test/MC/Hexagon/duplex-registers.s b/llvm/test/MC/Hexagon/duplex-registers.s index f0cde7f9628..2a02b4534f2 100644 --- a/llvm/test/MC/Hexagon/duplex-registers.s +++ b/llvm/test/MC/Hexagon/duplex-registers.s @@ -7,4 +7,4 @@ } # CHECK: 289808ba -# CHECK: r16 = memuh(r17 + #0);{{ *}}r18 = memuh(r19 + #0) +# CHECK: r16 = memuh(r17+#0);{{ *}}r18 = memuh(r19+#0) diff --git a/llvm/test/MC/Hexagon/fixups.s b/llvm/test/MC/Hexagon/fixups.s index 059a18fa882..33913362df7 100644 --- a/llvm/test/MC/Hexagon/fixups.s +++ b/llvm/test/MC/Hexagon/fixups.s @@ -3,7 +3,7 @@ .text # CHECK-LABEL: 0: # CHECK: 2442e106 -# CHECK: if (!cmp.eq(r1.new, #1)) jump:t 0xc +# CHECK: if (!cmp.eq(r1.new,#1)) jump:t 0xc { r1 = zxth(r2) if (!cmp.eq(r1.new, #1)) jump:t .L1 @@ -15,7 +15,7 @@ # CHECK: 00004020 # CHECK: immext(#2048) # CHECK: 2442e118 -# CHECK: if (!cmp.eq(r1.new, #1)) jump:t 0x81c +# CHECK: if (!cmp.eq(r1.new,#1)) jump:t 0x81c { r1 = zxth(r2) if (!cmp.eq(r1.new, #1)) jump:t .L2 diff --git a/llvm/test/MC/Hexagon/iconst.s b/llvm/test/MC/Hexagon/iconst.s index 277c4de8692..917cc64ba95 100644 --- a/llvm/test/MC/Hexagon/iconst.s +++ b/llvm/test/MC/Hexagon/iconst.s @@ -1,6 +1,6 @@ # RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d -r - | FileCheck %s a: -# CHECK: r0 = add(r0, #0) +# CHECK: r0 = add(r0,#0) # CHECK: R_HEX_23_REG -r0 = iconst(#a)
\ No newline at end of file +r0 = iconst(#a) diff --git a/llvm/test/MC/Hexagon/inst_cmp_eq.ll b/llvm/test/MC/Hexagon/inst_cmp_eq.ll index 98202368aff..5c483451d71 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_eq.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_eq.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a, i32 %b) ret i1 %1 } -; CHECK: p0 = cmp.eq(r0, r1) +; CHECK: p0 = cmp.eq(r0,r1) ; CHECK: r0 = p0 ; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/inst_cmp_eqi.ll b/llvm/test/MC/Hexagon/inst_cmp_eqi.ll index 612dfdc8f23..5d8132b70bb 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_eqi.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_eqi.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a) ret i1 %1 } -; CHECK: p0 = cmp.eq(r0, #42) +; CHECK: p0 = cmp.eq(r0,#42) ; CHECK: r0 = p0 ; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/inst_cmp_gt.ll b/llvm/test/MC/Hexagon/inst_cmp_gt.ll index 3ce1c0addad..45a4e33e940 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_gt.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_gt.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a, i32 %b) ret i1 %1 } -; CHECK: p0 = cmp.gt(r0, r1) +; CHECK: p0 = cmp.gt(r0,r1) ; CHECK: r0 = p0 -; CHECK: jumpr r31 }
\ No newline at end of file +; CHECK: jumpr r31 } diff --git a/llvm/test/MC/Hexagon/inst_cmp_gti.ll b/llvm/test/MC/Hexagon/inst_cmp_gti.ll index f3c13a2fb96..67cdc4c909b 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_gti.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_gti.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a) ret i1 %1 } -; CHECK: p0 = cmp.gt(r0, #42) +; CHECK: p0 = cmp.gt(r0,#42) ; CHECK: r0 = p0 ; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/inst_cmp_lt.ll b/llvm/test/MC/Hexagon/inst_cmp_lt.ll index 80ba16f4141..b19a4a676aa 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_lt.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_lt.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a, i32 %b) ret i1 %1 } -; CHECK: p0 = cmp.gt(r1, r0) +; CHECK: p0 = cmp.gt(r1,r0) ; CHECK: r0 = p0 ; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/inst_cmp_ugt.ll b/llvm/test/MC/Hexagon/inst_cmp_ugt.ll index 07fa784dc64..7af40c6ed03 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_ugt.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_ugt.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a, i32 %b) ret i1 %1 } -; CHECK: p0 = cmp.gtu(r0, r1) +; CHECK: p0 = cmp.gtu(r0,r1) ; CHECK: r0 = p0 ; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/inst_cmp_ugti.ll b/llvm/test/MC/Hexagon/inst_cmp_ugti.ll index 59db552b39f..63d94e4ff87 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_ugti.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_ugti.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a) ret i1 %1 } -; CHECK: p0 = cmp.gtu(r0, #42) +; CHECK: p0 = cmp.gtu(r0,#42) ; CHECK: r0 = p0 ; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/inst_cmp_ult.ll b/llvm/test/MC/Hexagon/inst_cmp_ult.ll index c880ac8a229..ecda120a459 100644 --- a/llvm/test/MC/Hexagon/inst_cmp_ult.ll +++ b/llvm/test/MC/Hexagon/inst_cmp_ult.ll @@ -7,6 +7,6 @@ define i1 @foo (i32 %a, i32 %b) ret i1 %1 } -; CHECK: p0 = cmp.gtu(r1, r0) +; CHECK: p0 = cmp.gtu(r1,r0) ; CHECK: r0 = p0 -; CHECK: jumpr r31
\ No newline at end of file +; CHECK: jumpr r31 diff --git a/llvm/test/MC/Hexagon/instructions/system_user.s b/llvm/test/MC/Hexagon/instructions/system_user.s index f0ead9645dd..02c81fa0992 100644 --- a/llvm/test/MC/Hexagon/instructions/system_user.s +++ b/llvm/test/MC/Hexagon/instructions/system_user.s @@ -57,6 +57,3 @@ syncht # CHECK: 18 df 00 54 trap0(#254) - -# CHECK: 14 df 80 54 -trap1(#253) diff --git a/llvm/test/MC/Hexagon/jumpdoublepound.s b/llvm/test/MC/Hexagon/jumpdoublepound.s index 6b829360a90..8d0eef7fb60 100644 --- a/llvm/test/MC/Hexagon/jumpdoublepound.s +++ b/llvm/test/MC/Hexagon/jumpdoublepound.s @@ -7,7 +7,7 @@ mylabel: # CHECK: if (p0) jump if (p0) jump ##mylabel -# CHECK: if (cmp.gtu(r5.new, r4)) jump:t +# CHECK: if (cmp.gtu(r5.new,r4)) jump:t { r5 = r4 if (cmp.gtu(r5.new, r4)) jump:t ##mylabel } diff --git a/llvm/test/MC/Hexagon/labels.s b/llvm/test/MC/Hexagon/labels.s index d52ae004b07..f2b62d1412b 100644 --- a/llvm/test/MC/Hexagon/labels.s +++ b/llvm/test/MC/Hexagon/labels.s @@ -10,17 +10,17 @@ r1: # CHECK: nop r3:nop -# CHECK: r5:4 = combine(r5, r4) +# CHECK: r5:4 = combine(r5,r4) r5:4 = r5:4 # CHECK: r0 = r1 -# CHECK: p0 = tstbit(r0, #10) +# CHECK: p0 = tstbit(r0,#10) # CHECK: if (!p0) jump 1:r0=r1; p0=tstbit(r0, #10); if !p0 jump 1b; # CHECK: nop -# CHECK: r1 = add(r1, #4) -# CHECK: r5 = memw(r1 + #0) +# CHECK: r1 = add(r1,#4) +# CHECK: r5 = memw(r1+#0) # CHECK: endloop0 b: { r5 = memw(r1) - r1 = add(r1, #4) } : endloop0
\ No newline at end of file + r1 = add(r1, #4) } : endloop0 diff --git a/llvm/test/MC/Hexagon/register-alt-names.s b/llvm/test/MC/Hexagon/register-alt-names.s index 97bfd32c51d..3e514661887 100644 --- a/llvm/test/MC/Hexagon/register-alt-names.s +++ b/llvm/test/MC/Hexagon/register-alt-names.s @@ -9,6 +9,6 @@ r1 = fp # CHECK: r2 = r29 r2 = sp -# CHECK: r1:0 = combine(r31, r30) +# CHECK: r1:0 = combine(r31,r30) r1:0 = lr:fp diff --git a/llvm/test/MC/Hexagon/relaxed_newvalue.s b/llvm/test/MC/Hexagon/relaxed_newvalue.s index 65fbd312e0a..4e8c6cc2cbc 100644 --- a/llvm/test/MC/Hexagon/relaxed_newvalue.s +++ b/llvm/test/MC/Hexagon/relaxed_newvalue.s @@ -1,9 +1,9 @@ # RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s # Make sure relaxation doesn't hinder newvalue calculation -#CHECK: r18 = add(r2, #-6) +#CHECK: r18 = add(r2,#-6) #CHECK-NEXT: immext(#0) -#CHECK-NEXT: if (!cmp.gt(r18.new, #1)) jump:t +#CHECK-NEXT: if (!cmp.gt(r18.new,#1)) jump:t { r18 = add(r2, #-6) if (!cmp.gt(r18.new, #1)) jump:t .unknown diff --git a/llvm/test/MC/Hexagon/two-extenders.s b/llvm/test/MC/Hexagon/two-extenders.s index 49016639de1..31457927013 100644 --- a/llvm/test/MC/Hexagon/two-extenders.s +++ b/llvm/test/MC/Hexagon/two-extenders.s @@ -19,7 +19,7 @@ if (p3.new) r23 = memb(##2164335510) p3 = or(p2,or(p3, p0)) } -# CHECK: { p3 = or(p2, or(p3, p0)) +# CHECK: { p3 = or(p2,or(p3,p0)) # CHECK: immext(#2164335488) # CHECK: if (p3.new) r23 = memb(##2164335510) } diff --git a/llvm/test/MC/Hexagon/v60-misc.s b/llvm/test/MC/Hexagon/v60-misc.s index e16034948dc..b278447ab10 100644 --- a/llvm/test/MC/Hexagon/v60-misc.s +++ b/llvm/test/MC/Hexagon/v60-misc.s @@ -14,10 +14,10 @@ if (p2) jumpr r0 # CHECK: 5361c300 { if (!p3) jumpr:nt if (!p3) jumpr r1 -# CHECK: 1c2eceee { v14 = vxor(v14,{{ *}}v14) } +# CHECK: 1c2eceee { v14 = vxor(v14,v14) } v14 = #0 -# CHECK: 1c80c0a0 { v1:0.w = vsub(v1:0.w,v1:0.w) } +# CHECK: 1c9edea0 { v1:0.w = vsub(v31:30.w,v31:30.w) } v1:0 = #0 # CHECK: 1f42c3e0 { v1:0 = vcombine(v3,v2) } @@ -53,7 +53,7 @@ q0 = vcmp.eq(v8.uw, v9.uw) # CHECK: 1c8aea09 { q1 &= vcmp.eq(v10.w,v10.w) } q1 &= vcmp.eq(v10.uw, v10.uw) -# CHECK: 1c8ceb46 { q2 |= vcmp.eq(v11.h,v12.h) } +# CHECK: 1c8ceb4a { q2 |= vcmp.eq(v11.w,v12.w) } q2 |= vcmp.eq(v11.uw, v12.uw) # CHECK: 1c8eed8b { q3 ^= vcmp.eq(v13.w,v14.w) } diff --git a/llvm/test/MC/Hexagon/v60-vmem.s b/llvm/test/MC/Hexagon/v60-vmem.s index fe202251ec4..0580a1e6244 100644 --- a/llvm/test/MC/Hexagon/v60-vmem.s +++ b/llvm/test/MC/Hexagon/v60-vmem.s @@ -327,25 +327,25 @@ vmem(r6+#-6):nt=v16.new } -#CHECK: 28b1cd42 if(p1) vmem(r17+#5) = v17.new } +#CHECK: 28b1cd42 if (p1) vmem(r17+#5) = v17.new } { v17 = v25 if(p1)vmem(r17+#5)=v17.new } -#CHECK: 28bbeb6a if(!p1) vmem(r27+#-5) = v17.new } +#CHECK: 28bbeb6a if (!p1) vmem(r27+#-5) = v17.new } { v17 = v15 if(!p1)vmem(r27+#-5)=v17.new } -#CHECK: 28e4d252 if(p2) vmem(r4+#2):nt = v24.new } +#CHECK: 28e4d252 if (p2) vmem(r4+#2):nt = v24.new } { v24 = v10 if(p2)vmem(r4+#2):nt=v24.new } -#CHECK: 28f8d17a if(!p2) vmem(r24+#1):nt = v4.new } +#CHECK: 28f8d17a if (!p2) vmem(r24+#1):nt = v4.new } { v4 = v8 if(!p2)vmem(r24+#1):nt=v4.new @@ -363,25 +363,25 @@ vmem(r1++#1):nt=v7.new } -#CHECK: 29a6d042 if(p2) vmem(r6++#0) = v11.new } +#CHECK: 29a6d042 if (p2) vmem(r6++#0) = v11.new } { v11 = v13 if(p2)vmem(r6++#0)=v11.new } -#CHECK: 29a2cb6a if(!p1) vmem(r2++#3) = v25.new } +#CHECK: 29a2cb6a if (!p1) vmem(r2++#3) = v25.new } { v25 = v17 if(!p1)vmem(r2++#3)=v25.new } -#CHECK: 29f5c952 if(p1) vmem(r21++#1):nt = v14.new } +#CHECK: 29f5c952 if (p1) vmem(r21++#1):nt = v14.new } { v14 = v13 if(p1)vmem(r21++#1):nt=v14.new } -#CHECK: 29f7cd7a if(!p1) vmem(r23++#-3):nt = v1.new } +#CHECK: 29f7cd7a if (!p1) vmem(r23++#-3):nt = v1.new } { v1 = v0 if(!p1)vmem(r23++#-3):nt=v1.new @@ -399,25 +399,25 @@ vmem(r15++m0):nt=v19.new } -#CHECK: 2bb7f042 if(p2) vmem(r23++m1) = v6.new } +#CHECK: 2bb7f042 if (p2) vmem(r23++m1) = v6.new } { v6 = v30 if(p2)vmem(r23++m1)=v6.new } -#CHECK: 2ba2f06a if(!p2) vmem(r2++m1) = v12.new } +#CHECK: 2ba2f06a if (!p2) vmem(r2++m1) = v12.new } { v12 = v9 if(!p2)vmem(r2++m1)=v12.new } -#CHECK: 2be7e852 if(p1) vmem(r7++m1):nt = v3.new } +#CHECK: 2be7e852 if (p1) vmem(r7++m1):nt = v3.new } { v3 = v13 if(p1)vmem(r7++m1):nt=v3.new } -#CHECK: 2bfdd07a if(!p2) vmem(r29++m0):nt = v29.new } +#CHECK: 2bfdd07a if (!p2) vmem(r29++m0):nt = v29.new } { v29 = v9 if(!p2)vmem(r29++m0):nt=v29.new |
