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| author | James Y Knight <jyknight@google.com> | 2015-05-18 16:29:48 +0000 |
|---|---|---|
| committer | James Y Knight <jyknight@google.com> | 2015-05-18 16:29:48 +0000 |
| commit | 807563df227b4d9961d60adf73c26e571615a815 (patch) | |
| tree | 5541421ed3b9690a276c8b878df9f1c9e4da696e /llvm/test/MC | |
| parent | 0c553afe6a401d79f615faa5a72c991dc4654ec9 (diff) | |
| download | bcm5719-llvm-807563df227b4d9961d60adf73c26e571615a815.tar.gz bcm5719-llvm-807563df227b4d9961d60adf73c26e571615a815.zip | |
Add support for the Sparc implementation-defined "ASR" registers.
(Note that register "Y" is essentially just ASR0).
Also added some test cases for divide and multiply, which had none before.
Differential Revision: http://reviews.llvm.org/D8670
llvm-svn: 237580
Diffstat (limited to 'llvm/test/MC')
| -rw-r--r-- | llvm/test/MC/Disassembler/Sparc/sparc.txt | 15 | ||||
| -rw-r--r-- | llvm/test/MC/Sparc/sparc-special-registers.s | 17 |
2 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Sparc/sparc.txt b/llvm/test/MC/Disassembler/Sparc/sparc.txt index a9420246361..038aef53d51 100644 --- a/llvm/test/MC/Disassembler/Sparc/sparc.txt +++ b/llvm/test/MC/Disassembler/Sparc/sparc.txt @@ -200,3 +200,18 @@ # CHECK: rett %i7+8 0x81 0xcf 0xe0 0x08 + +# CHECK: rd %y, %i0 +0xb1 0x40 0x00 0x00 + +# CHECK: rd %asr1, %i0 +0xb1 0x40 0x40 0x00 + +# CHECK: wr %i0, 5, %y +0x81 0x86 0x20 0x05 + +# CHECK: wr %i0, %i1, %asr15 +0x9f 0x86 0x00 0x19 + +# CHECK: stbar +0x81 0x43 0xc0 0x00 diff --git a/llvm/test/MC/Sparc/sparc-special-registers.s b/llvm/test/MC/Sparc/sparc-special-registers.s new file mode 100644 index 00000000000..74e4fc6350b --- /dev/null +++ b/llvm/test/MC/Sparc/sparc-special-registers.s @@ -0,0 +1,17 @@ +! RUN: llvm-mc %s -arch=sparc -show-encoding | FileCheck %s +! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s + + ! CHECK: rd %y, %i0 ! encoding: [0xb1,0x40,0x00,0x00] + rd %y, %i0 + + ! CHECK: rd %asr1, %i0 ! encoding: [0xb1,0x40,0x40,0x00] + rd %asr1, %i0 + + ! CHECK: wr %i0, 5, %y ! encoding: [0x81,0x86,0x20,0x05] + wr %i0, 5, %y + + ! CHECK: wr %i0, %i1, %asr15 ! encoding: [0x9f,0x86,0x00,0x19] + wr %i0, %i1, %asr15 + + ! CHECK: rd %asr15, %g0 ! encoding: [0x81,0x43,0xc0,0x00] + rd %asr15, %g0 |
