summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC
diff options
context:
space:
mode:
authorColin LeMahieu <colinl@codeaurora.org>2015-01-07 20:07:28 +0000
committerColin LeMahieu <colinl@codeaurora.org>2015-01-07 20:07:28 +0000
commit777abcb1d71daac6d4cce618cf33390f6647ec7c (patch)
tree08400e26ac681904aa8225e83a4904a940e32d9e /llvm/test/MC
parentea56f08b3f0dd93dd4071946d833c8bcff587838 (diff)
downloadbcm5719-llvm-777abcb1d71daac6d4cce618cf33390f6647ec7c.tar.gz
bcm5719-llvm-777abcb1d71daac6d4cce618cf33390f6647ec7c.zip
[Hexagon] Adding encoding for popcount, fastcorner, dword asr with rounding.
llvm-svn: 225371
Diffstat (limited to 'llvm/test/MC')
-rw-r--r--llvm/test/MC/Disassembler/Hexagon/cr.txt4
-rw-r--r--llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt2
-rw-r--r--llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt2
3 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Hexagon/cr.txt b/llvm/test/MC/Disassembler/Hexagon/cr.txt
index bcba0ba34c5..89157156cff 100644
--- a/llvm/test/MC/Disassembler/Hexagon/cr.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/cr.txt
@@ -1,5 +1,9 @@
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+0x93 0xe1 0x12 0x6b
+# CHECK: p3 = !fastcorner9(p2, p1)
+0x91 0xe3 0x02 0x6b
+# CHECK: p1 = fastcorner9(p2, p3)
0x01 0xc0 0x82 0x6b
# CHECK: p1 = any8(p2)
0x01 0xc0 0xa2 0x6b
diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt
index 9ee340b5690..d1ec38e0218 100644
--- a/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/xtype_bit.txt
@@ -20,6 +20,8 @@
# CHECK: r17 = cl1(r21)
0xf1 0xc0 0x15 0x8c
# CHECK: r17 = normamt(r21)
+0x71 0xc0 0x74 0x88
+# CHECK: r17 = popcount(r21:20)
0x51 0xc0 0xf4 0x88
# CHECK: r17 = ct0(r21:20)
0x91 0xc0 0xf4 0x88
diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt
index 1a0fbe41852..9912fd3f1f4 100644
--- a/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/xtype_shift.txt
@@ -86,6 +86,8 @@
# CHECK: r17 ^= lsr(r21, #31)
0x51 0xdf 0x95 0x8e
# CHECK: r17 ^= asl(r21, #31)
+0xf0 0xdf 0xd4 0x80
+# CHECK: r17:16 = asr(r21:20, #31):rnd
0x11 0xdf 0x55 0x8c
# CHECK: r17 = asr(r21, #31):rnd
0x51 0xdf 0x55 0x8c
OpenPOWER on IntegriCloud